Methodology for automated phase noise minimization in RF circuit interconnect trees

Dimo Martev; Sven Hampel; Ulf Schlichtmann

doi:10.1109/ISCAS.2017.8051013

Methodology for automated phase noise minimization in RF circuit interconnect trees

Dimo Martev
, Sven Hampel
, Ulf Schlichtmann

Chair of Electronic Design Automation

Technical University of Munich
Intel Deutschland GmbH

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

1 Scopus citations

Abstract

We present a methodology for phase noise minimization of interconnects in radio frequency circuits, integrated into a commercial digital tool chain. Accurate estimates of the produced phase noise are derived using a lookup table approach, eliminating the need for analog simulations. A dynamic programming algorithm is utilized to produce the optimal tree structure. The tree is automatically translated into a netlist and placed and routed within the VLSI flow. Back annotated simulations in 28 nm technology show that the obtained results are within 2.2 dB of the actual phase noise, while significantly reducing the design time compared to traditional manual design. To the best of our knowledge, this is the first work on the automation of buffer insertion for phase noise minimization.

Original language	English
Title of host publication	IEEE International Symposium on Circuits and Systems
Subtitle of host publication	From Dreams to Innovation, ISCAS 2017 - Conference Proceedings
Publisher	Institute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)	9781467368520
DOIs	https://doi.org/10.1109/ISCAS.2017.8051013
State	Published - 25 Sep 2017
Event	50th IEEE International Symposium on Circuits and Systems, ISCAS 2017 - Baltimore, United States Duration: 28 May 2017 → 31 May 2017

Publication series

Name	Proceedings - IEEE International Symposium on Circuits and Systems
ISSN (Print)	0271-4310

Conference

Conference	50th IEEE International Symposium on Circuits and Systems, ISCAS 2017
Country/Territory	United States
City	Baltimore
Period	28/05/17 → 31/05/17

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10.1109/ISCAS.2017.8051013

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Martev, D., Hampel, S., & Schlichtmann, U. (2017). Methodology for automated phase noise minimization in RF circuit interconnect trees. In IEEE International Symposium on Circuits and Systems: From Dreams to Innovation, ISCAS 2017 - Conference Proceedings Article 8051013 (Proceedings - IEEE International Symposium on Circuits and Systems). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ISCAS.2017.8051013

Martev, Dimo ; Hampel, Sven ; Schlichtmann, Ulf. / Methodology for automated phase noise minimization in RF circuit interconnect trees. IEEE International Symposium on Circuits and Systems: From Dreams to Innovation, ISCAS 2017 - Conference Proceedings. Institute of Electrical and Electronics Engineers Inc., 2017. (Proceedings - IEEE International Symposium on Circuits and Systems).

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title = "Methodology for automated phase noise minimization in RF circuit interconnect trees",

abstract = "We present a methodology for phase noise minimization of interconnects in radio frequency circuits, integrated into a commercial digital tool chain. Accurate estimates of the produced phase noise are derived using a lookup table approach, eliminating the need for analog simulations. A dynamic programming algorithm is utilized to produce the optimal tree structure. The tree is automatically translated into a netlist and placed and routed within the VLSI flow. Back annotated simulations in 28 nm technology show that the obtained results are within 2.2 dB of the actual phase noise, while significantly reducing the design time compared to traditional manual design. To the best of our knowledge, this is the first work on the automation of buffer insertion for phase noise minimization.",

author = "Dimo Martev and Sven Hampel and Ulf Schlichtmann",

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year = "2017",

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doi = "10.1109/ISCAS.2017.8051013",

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Martev, D, Hampel, S & Schlichtmann, U 2017, Methodology for automated phase noise minimization in RF circuit interconnect trees. in IEEE International Symposium on Circuits and Systems: From Dreams to Innovation, ISCAS 2017 - Conference Proceedings., 8051013, Proceedings - IEEE International Symposium on Circuits and Systems, Institute of Electrical and Electronics Engineers Inc., 50th IEEE International Symposium on Circuits and Systems, ISCAS 2017, Baltimore, United States, 28/05/17. https://doi.org/10.1109/ISCAS.2017.8051013

Methodology for automated phase noise minimization in RF circuit interconnect trees. / Martev, Dimo; Hampel, Sven; Schlichtmann, Ulf.
IEEE International Symposium on Circuits and Systems: From Dreams to Innovation, ISCAS 2017 - Conference Proceedings. Institute of Electrical and Electronics Engineers Inc., 2017. 8051013 (Proceedings - IEEE International Symposium on Circuits and Systems).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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T1 - Methodology for automated phase noise minimization in RF circuit interconnect trees

AU - Martev, Dimo

AU - Hampel, Sven

AU - Schlichtmann, Ulf

PY - 2017/9/25

Y1 - 2017/9/25

N2 - We present a methodology for phase noise minimization of interconnects in radio frequency circuits, integrated into a commercial digital tool chain. Accurate estimates of the produced phase noise are derived using a lookup table approach, eliminating the need for analog simulations. A dynamic programming algorithm is utilized to produce the optimal tree structure. The tree is automatically translated into a netlist and placed and routed within the VLSI flow. Back annotated simulations in 28 nm technology show that the obtained results are within 2.2 dB of the actual phase noise, while significantly reducing the design time compared to traditional manual design. To the best of our knowledge, this is the first work on the automation of buffer insertion for phase noise minimization.

AB - We present a methodology for phase noise minimization of interconnects in radio frequency circuits, integrated into a commercial digital tool chain. Accurate estimates of the produced phase noise are derived using a lookup table approach, eliminating the need for analog simulations. A dynamic programming algorithm is utilized to produce the optimal tree structure. The tree is automatically translated into a netlist and placed and routed within the VLSI flow. Back annotated simulations in 28 nm technology show that the obtained results are within 2.2 dB of the actual phase noise, while significantly reducing the design time compared to traditional manual design. To the best of our knowledge, this is the first work on the automation of buffer insertion for phase noise minimization.

UR - https://www.scopus.com/pages/publications/85032696074

U2 - 10.1109/ISCAS.2017.8051013

DO - 10.1109/ISCAS.2017.8051013

M3 - Conference contribution

AN - SCOPUS:85032696074

T3 - Proceedings - IEEE International Symposium on Circuits and Systems

BT - IEEE International Symposium on Circuits and Systems

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 50th IEEE International Symposium on Circuits and Systems, ISCAS 2017

Y2 - 28 May 2017 through 31 May 2017

ER -

Martev D, Hampel S, Schlichtmann U. Methodology for automated phase noise minimization in RF circuit interconnect trees. In IEEE International Symposium on Circuits and Systems: From Dreams to Innovation, ISCAS 2017 - Conference Proceedings. Institute of Electrical and Electronics Engineers Inc. 2017. 8051013. (Proceedings - IEEE International Symposium on Circuits and Systems). doi: 10.1109/ISCAS.2017.8051013

Methodology for automated phase noise minimization in RF circuit interconnect trees

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