TY - GEN
T1 - Low-power 3D integrated ferromagnetic computing
AU - Becherer, M.
AU - Breitkreutz, S.
AU - Eichwald, I.
AU - Ziemys, G.
AU - Kiermaier, J.
AU - Csaba, G.
AU - Schmitt-Landsiedel, D.
N1 - Publisher Copyright:
© 2015 IEEE.
PY - 2015/3/18
Y1 - 2015/3/18
N2 - As CMOS scaling becomes more and more challenging there is strong impetus for beyond CMOS device research to add new functionality to ICs. In this article, a promising technology with non-volatile ferromagnetic computing states - the so-called perpendicular Nanomagnetic Logic (pNML) - is reviewed. After introducing the 2D planar implementation of NML with magnetization perpendicular to the surface, the path to monolithically 3D integrated systems is discussed. Instead of CMOS substitution, additional functionality is added by a coprocessor architecture as a prospective back-end-of-line (BEOL) process. The unconventional computation in the ferromagnetic domain can lead to highly dense computing structures without leakage currents, atto-joule dissipation per bit operation and data-throughputs comparable to state-of-the-art high-performance CMOS CPUs.
AB - As CMOS scaling becomes more and more challenging there is strong impetus for beyond CMOS device research to add new functionality to ICs. In this article, a promising technology with non-volatile ferromagnetic computing states - the so-called perpendicular Nanomagnetic Logic (pNML) - is reviewed. After introducing the 2D planar implementation of NML with magnetization perpendicular to the surface, the path to monolithically 3D integrated systems is discussed. Instead of CMOS substitution, additional functionality is added by a coprocessor architecture as a prospective back-end-of-line (BEOL) process. The unconventional computation in the ferromagnetic domain can lead to highly dense computing structures without leakage currents, atto-joule dissipation per bit operation and data-throughputs comparable to state-of-the-art high-performance CMOS CPUs.
UR - http://www.scopus.com/inward/record.url?scp=84926484169&partnerID=8YFLogxK
U2 - 10.1109/ULIS.2015.7063788
DO - 10.1109/ULIS.2015.7063788
M3 - Conference contribution
AN - SCOPUS:84926484169
T3 - EUROSOI-ULIS 2015 - 2015 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon
SP - 121
EP - 124
BT - EUROSOI-ULIS 2015 - 2015 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2015 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon, EUROSOI-ULIS 2015
Y2 - 26 January 2015 through 28 January 2015
ER -