Low frequency noise considerations for CMOS analog circuit design

Ralf Brederlow, Jeongwook Koh, Gilson I. Wirth, Roberto Da Silva, Marc Tiebout, Roland Thewes

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

6 Scopus citations

Abstract

This paper gives an overview on 1/f-noise issues relevant for today's CMOS analog circuit design. The device-to-circuit relation of noise and the relevant operating conditions are reviewed. Modeling of the biasing dependence of 1/f-noise amplitude including large signal and statistical effects are discussed. The noise corner frequency is shown to increase with CMOS technology scaling, and statistical effects are shown to even scale worse compared to the 1/f-noise. Moreover circuit design measures against noise are investigated. Finally, reliability issues concerning 1/f-noise in analog circuits are reviewed.

Original languageEnglish
Title of host publicationNOISE AND FLUCTUATIONS
Subtitle of host publication18th International Conference on Noise and Fluctuations - ICNF 2005
Pages703-708
Number of pages6
DOIs
StatePublished - 25 Aug 2005
Externally publishedYes
EventNOISE AND FLUCTUATIONS: 18th International Conference on Noise and Fluctuations - ICNF 2005 - Salamanca, Spain
Duration: 19 Sep 200523 Sep 2005

Publication series

NameAIP Conference Proceedings
Volume780
ISSN (Print)0094-243X
ISSN (Electronic)1551-7616

Conference

ConferenceNOISE AND FLUCTUATIONS: 18th International Conference on Noise and Fluctuations - ICNF 2005
Country/TerritorySpain
CitySalamanca
Period19/09/0523/09/05

Keywords

  • 1/f-noise
  • CMOS low noise
  • Flicker noise
  • Low noise circuit design

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