Abstract
The paper discusses enhancements in quantitative thermal lock-in analysis through spatial phase evaluation for defect localization in complex microelectronic components. It addresses the challenges of increasing integration density and diverse material composition in microelectronics. The primary focus of the present work is placed on improving sensitivity and spatial resolution of lock-in thermography for detection, imaging and the quantitative localization of thermally active electrical defects in all three spatial dimensions inside a device under test (DUT) to enable precise fault isolation. The paper describes the analysis of the lateral phase distribution in the presence of a thermal hot spot for reconstructing the thermal wave at the surface of the DUT and its back-tracing to its source inside the DUT. In the practical application this processing results in a reduction of thermal spreading effects and a precise localization in the lateral and axial (depth) directions. Experimental results demonstrate substantial improvements in precision and accuracy of defect localization and additionally a quantitative depth estimation. The paper highlights the potential application of the proposed method for non-destructive defect localization in 3D-integrated microelectronic devices.
Original language | English |
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Article number | 115690 |
Journal | Microelectronics Reliability |
Volume | 168 |
DOIs | |
State | Published - May 2025 |
Externally published | Yes |
Keywords
- 3D quantitative defect localization
- 3D-LIT
- Lock in thermography
- Non-destructive defect depth localization