Invasive computing: An overview

Jürgen Teich, Jörg Henkel, Andreas Herkersdorf, Doris Schmitt-Landsiedel, Wolfgang Schröder-Preikschat, Gregor Snelting

Research output: Chapter in Book/Report/Conference proceedingChapterpeer-review

123 Scopus citations


A novel paradigm for designing and programming future parallel computing systems called invasive computing is proposed. The main idea and novelty of invasive computing is to introduce resource-aware programming support in the sense that a given program gets the ability to explore and dynamically spread its computations to neighbour processors in a phase called invasion, then to execute portions of code of high parallelism degree in parallel based on the available invasible region on a given multi-processor architecture. Afterwards, once the program terminates or if the degree of parallelism should be lower again, the program may enter a retreat phase, deallocate resources and resume execution again, for example, sequentially on a single processor. To support this idea of self-adaptive and resource-aware programming, not only new programming concepts, languages, compilers and operating systems are necessary but also revolutionary architectural changes in the design of Multi-Processor Systems-on-a-Chip must be provided so to efficiently support invasion, infection and retreat operations involving concepts for dynamic processor, interconnect and memory reconfiguration. This contribution reveals the main ideas, potential benefits and challenges for supporting invasive computing at the architectural, programming and compiler level in the future. It serves to give an overview of required research topics rather than being able to present mature solutions yet.

Original languageEnglish
Title of host publicationMultiprocessor System-on-Chip
Subtitle of host publicationHardware Design and Tool Integration
PublisherSpringer New York
Number of pages28
ISBN (Print)9781441964595
StatePublished - 2011


  • B (Hardware)
  • B.7 (Hardware: Integrated Circuits)
  • C (Computer Systems Organisation)
  • C.1 (Computer Systems Organisation; Processor Architectures)
  • C.3 (Computer Systems Organisation: Special-Purpose and Application-Based Systems)


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