Integrated systems-in-package

Amelie Hagelauer; Robert Weigel; Maciej Wojnowski; Klaus Pressel; Dietmar Kissinger

doi:10.1109/MMM.2017.2759558

Integrated systems-in-package

Amelie Hagelauer, Robert Weigel, Maciej Wojnowski, Klaus Pressel, Dietmar Kissinger

Research output: Contribution to journal › Article › peer-review

41 Scopus citations

Abstract

The introduction of fine-line interposers or packaging technologies with a redistribution layer (RDL) can significantly relax the fine-line spacing requirements on the PCB. One of these fan-out wafer-level packaging technologies is the embedded wafer-level ballgrid-array (eWLB) package, which features a number of favorable high-frequency characteristics. It is optimized in terms of the requirements for high integration density with a large number of external interfaces and has been developed by the companies Infineon Technologies, ST Microelectronics, and STATS ChipPAC. This eWLB packaging technique represents a tradeoff between both a chip-level packaging and a wafer-level packaging approach.

Original language	English
Pages (from-to)	48-56
Number of pages	9
Journal	IEEE Microwave Magazine
Volume	19
Issue number	1
DOIs	https://doi.org/10.1109/MMM.2017.2759558
State	Published - 1 Jan 2018
Externally published	Yes

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AU - Pressel, Klaus

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AB - The introduction of fine-line interposers or packaging technologies with a redistribution layer (RDL) can significantly relax the fine-line spacing requirements on the PCB. One of these fan-out wafer-level packaging technologies is the embedded wafer-level ballgrid-array (eWLB) package, which features a number of favorable high-frequency characteristics. It is optimized in terms of the requirements for high integration density with a large number of external interfaces and has been developed by the companies Infineon Technologies, ST Microelectronics, and STATS ChipPAC. This eWLB packaging technique represents a tradeoff between both a chip-level packaging and a wafer-level packaging approach.

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Integrated systems-in-package

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