TY - GEN
T1 - Impact of process parameter variations on the energy dissipation in adiabatic logic
AU - Fischer, Juergen
AU - Amirante, Ettore
AU - Nirschl, Thomas
AU - Teichmann, Philip
AU - Henzler, Stephan
AU - Schmitt-Landsiedel, Doris
PY - 2005
Y1 - 2005
N2 - Adiabatic logic offers high energy savings compared to standard CMOS at moderate operating speeds. Until now only rudimentary investigations of the robustness of adiabatic circuits were presented. However, in deep sub-micron technologies the deviation of the device parameters from their nominal value is of crucial importance. By means of Monte-Carlo simulations in a 130nm CMOS technology, the impact of the process parameter variations on the energy dissipation is derived, where both global and local variations are considered. Comparing the energy dissipation of the 97.7% percentiles of adiabatic families with the ones for static CMOS, energy savings up to a factor of 10 are observed.
AB - Adiabatic logic offers high energy savings compared to standard CMOS at moderate operating speeds. Until now only rudimentary investigations of the robustness of adiabatic circuits were presented. However, in deep sub-micron technologies the deviation of the device parameters from their nominal value is of crucial importance. By means of Monte-Carlo simulations in a 130nm CMOS technology, the impact of the process parameter variations on the energy dissipation is derived, where both global and local variations are considered. Comparing the energy dissipation of the 97.7% percentiles of adiabatic families with the ones for static CMOS, energy savings up to a factor of 10 are observed.
UR - http://www.scopus.com/inward/record.url?scp=33749003121&partnerID=8YFLogxK
U2 - 10.1109/ECCTD.2005.1523152
DO - 10.1109/ECCTD.2005.1523152
M3 - Conference contribution
AN - SCOPUS:33749003121
SN - 0780390660
SN - 9780780390669
T3 - Proceedings of the 2005 European Conference on Circuit Theory and Design
SP - 429
EP - 432
BT - Proceedings of the 2005 European Conference on Circuit Theory and Design
T2 - 2005 European Conference on Circuit Theory and Design
Y2 - 28 August 2005 through 2 September 2005
ER -