TY - GEN
T1 - HyVE
T2 - 6th IEEE Nordic Circuits and Systems Conference, NORCAS 2020
AU - Srivatsa, Akshay
AU - Nagel, Sebastian
AU - Fasfous, Nael
AU - Anh Vu Doan, Nguyen
AU - Wild, Thomas
AU - Herkersdorf, Andreas
N1 - Publisher Copyright:
© 2020 IEEE.
PY - 2020/10/27
Y1 - 2020/10/27
N2 - In computer architecture, multi-level cache hierarchies are invaluable to achieve good system performance. Even multiMByte last level caches are short on capacity, therefore, set associativity, write-back strategies and cache replacement policies become important runtime management aspects. Numerous eviction policies, such as LRU, LFU, etc., have been investigated, all attempting to minimize the number of cache replacements. Such standalone policies optimize for a single attribute (recency, frequency, etc.), limiting their benefits for applications exhibiting non-uniform memory access patterns. We propose a Hybrid Voting-based Eviction Policy (HyVE), which extends multiple standalone eviction policies with a ranking system and combines them using voting theory methodologies. The goal of HyVE is to make better replacement decisions by creating a consensus among its constituent eviction policies. Analyzing HyVE, we observed its ability to take different replacement decisions compared to its standalone counterparts, making it a unique and new eviction policy. HyVE not only combines standalone policies, but can also be reduced to any of its constituents, making it flexible. We explored different variants of HyVE, and evaluated them using PARSEC and SPLASH-2 workloads on the sniper multi-core simulator. We also compared HyVE to state-of-the-art set-dueling (DRRIP) and learning-based (Hawkeye) policies. Results show that on average, compared to the LRU policy, HyVE reduces cache misses by 7.4%, DRRIP by 5.5% and Hawkeye by 9.2%. Though Hawkeye exhibits better performance on average, HyVE offers a unique advantage for certain workloads by using a votingbased approach to solve the replacement problem. HyVE has been synthesized on an FPGA prototype. We breakdown HyVE's hardware overheads and analyze its impact on timing.
AB - In computer architecture, multi-level cache hierarchies are invaluable to achieve good system performance. Even multiMByte last level caches are short on capacity, therefore, set associativity, write-back strategies and cache replacement policies become important runtime management aspects. Numerous eviction policies, such as LRU, LFU, etc., have been investigated, all attempting to minimize the number of cache replacements. Such standalone policies optimize for a single attribute (recency, frequency, etc.), limiting their benefits for applications exhibiting non-uniform memory access patterns. We propose a Hybrid Voting-based Eviction Policy (HyVE), which extends multiple standalone eviction policies with a ranking system and combines them using voting theory methodologies. The goal of HyVE is to make better replacement decisions by creating a consensus among its constituent eviction policies. Analyzing HyVE, we observed its ability to take different replacement decisions compared to its standalone counterparts, making it a unique and new eviction policy. HyVE not only combines standalone policies, but can also be reduced to any of its constituents, making it flexible. We explored different variants of HyVE, and evaluated them using PARSEC and SPLASH-2 workloads on the sniper multi-core simulator. We also compared HyVE to state-of-the-art set-dueling (DRRIP) and learning-based (Hawkeye) policies. Results show that on average, compared to the LRU policy, HyVE reduces cache misses by 7.4%, DRRIP by 5.5% and Hawkeye by 9.2%. Though Hawkeye exhibits better performance on average, HyVE offers a unique advantage for certain workloads by using a votingbased approach to solve the replacement problem. HyVE has been synthesized on an FPGA prototype. We breakdown HyVE's hardware overheads and analyze its impact on timing.
UR - http://www.scopus.com/inward/record.url?scp=85099780812&partnerID=8YFLogxK
U2 - 10.1109/NorCAS51424.2020.9265136
DO - 10.1109/NorCAS51424.2020.9265136
M3 - Conference contribution
AN - SCOPUS:85099780812
T3 - 2020 IEEE Nordic Circuits and Systems Conference, NORCAS 2020 - Proceedings
BT - 2020 IEEE Nordic Circuits and Systems Conference, NORCAS 2020 - Proceedings
A2 - Nurmi, Jari
A2 - Wisland, Dag T.
A2 - Aunet, Snorre
A2 - Kjelgaard, Kristian
PB - Institute of Electrical and Electronics Engineers Inc.
Y2 - 27 October 2020 through 28 October 2020
ER -