TY - GEN
T1 - Highly Integrated Low Power Photomultiplier Readout ASIC comprising fast ADC to be used in the Antarctic Ice
AU - Schuklin, Dennis
AU - Roeber, Juergen
AU - Stadelmayer, Markus
AU - Mai, Timo
AU - Weigel, Robert
AU - Hagelauer, Amelie
N1 - Publisher Copyright:
© 2019 IEEE.
PY - 2019/5/7
Y1 - 2019/5/7
N2 - After the successful launch of IceCube, the work is currently concentrated the next generation neutrino observatory at South Pole, IceCube Gen2. The neutrino detection and post processing accuracy mostly relies on used electronic hardware. The proposed highly integrated, low power photomultiplier readout ASIC is designed for function in low temperatures of Antarctic. The microchip comprises an input pre-amplifier, a clock generator and an ADC with encoder logic featuring sampling rate of 500MHz, 6bit output accuracy with a smart extension of input related resolution up to 8bit in the area of interest. It achieves the same accuracy like a standard 8bit ADC architecture but with significantly less hardware overhead and power dissipation.
AB - After the successful launch of IceCube, the work is currently concentrated the next generation neutrino observatory at South Pole, IceCube Gen2. The neutrino detection and post processing accuracy mostly relies on used electronic hardware. The proposed highly integrated, low power photomultiplier readout ASIC is designed for function in low temperatures of Antarctic. The microchip comprises an input pre-amplifier, a clock generator and an ADC with encoder logic featuring sampling rate of 500MHz, 6bit output accuracy with a smart extension of input related resolution up to 8bit in the area of interest. It achieves the same accuracy like a standard 8bit ADC architecture but with significantly less hardware overhead and power dissipation.
KW - ADC
KW - Clock Generator
KW - Neutrino
KW - Operational Amplifier
KW - Photomultiplier
UR - https://www.scopus.com/pages/publications/85066048924
U2 - 10.1109/SIRF.2019.8709098
DO - 10.1109/SIRF.2019.8709098
M3 - Conference contribution
AN - SCOPUS:85066048924
T3 - 2019 IEEE 19th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, SiRF 2019
BT - 2019 IEEE 19th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, SiRF 2019
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 19th IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, SiRF 2019
Y2 - 20 January 2019 through 23 January 2019
ER -