TY - GEN
T1 - High abstraction level permutational ESD concept analysis
AU - Streibl, M.
AU - Zangl, F.
AU - Esmark, K.
AU - Schwencker, R.
AU - Stadler, W.
AU - Gossner, H.
AU - Druen, S.
AU - Schmitt-Landsiedel, D.
N1 - Publisher Copyright:
© 2003 ESDA.
PY - 2003
Y1 - 2003
N2 - A simulation approach is presented that allows to handle ESD simulation and analysis on a chip level complexity. In a Monte-Carlo like permutational simulation approach worst case ESD paths are identified. The simulator is embedded in an ESD analysis framework spanning from the chip protection description to an automated virtual HBM test routine with a respective fail reporting interface. The tools capabilities are demonstrated in the ESD analysis of a complex mixed signal design.
AB - A simulation approach is presented that allows to handle ESD simulation and analysis on a chip level complexity. In a Monte-Carlo like permutational simulation approach worst case ESD paths are identified. The simulator is embedded in an ESD analysis framework spanning from the chip protection description to an automated virtual HBM test routine with a respective fail reporting interface. The tools capabilities are demonstrated in the ESD analysis of a complex mixed signal design.
UR - http://www.scopus.com/inward/record.url?scp=84945232280&partnerID=8YFLogxK
M3 - Conference contribution
AN - SCOPUS:84945232280
T3 - Electrical Overstress/Electrostatic Discharge Symposium Proceedings
BT - 2003 Electrical Overstress/Electrostatic Discharge Symposium, EOS/ESD 2003
PB - ESD Association
T2 - 25th Electrical Overstress/Electrostatic Discharge Symposium, EOS/ESD 2003
Y2 - 21 September 2003 through 25 September 2003
ER -