Hardware assisted thread assignment for RISC based MPSoCs in invasive computing

Ravi Kumar Pujari, Thomas Wild, Andreas Herkersdorf, Benjamin Vogel, Jörg Henkel

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

7 Scopus citations

Abstract

One of the major challenges of future many-core architectures is the efficient utilization of the abundance of computing power. Invasive computing provides a computing paradigm wherein applications can economically use the available compute resources. Applications can expand and shrink on demand depending on their thread level parallelism and resource availability. In this paper we present an analytical justification for performing a hardware-software co-optimization of the thread assignment in a resource aware programming environment. We propose a dedicated hardware block to support thread assignments as an architectural extension to standard MPSoC designs.

Original languageEnglish
Title of host publication2011 International Symposium on Integrated Circuits, ISIC 2011
Pages106-109
Number of pages4
DOIs
StatePublished - 2011
Event2011 International Symposium on Integrated Circuits, ISIC 2011 - SingaporeSingapore, Singapore
Duration: 12 Dec 201114 Dec 2011

Publication series

Name2011 International Symposium on Integrated Circuits, ISIC 2011

Conference

Conference2011 International Symposium on Integrated Circuits, ISIC 2011
Country/TerritorySingapore
CitySingaporeSingapore
Period12/12/1114/12/11

Keywords

  • Invasive computing
  • Multiprocessor system on a chip
  • Resource aware programming
  • Thread assignment

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