TY - GEN
T1 - Fully scalable gain memory cell for future drams
AU - Krautschneider, W. H.
AU - Risch, L.
AU - Lau, K.
AU - Schmitt-Landsiedel, D.
N1 - Publisher Copyright:
© 1991 Elsevier Science Publishers B.V. All rights reserved.
PY - 1991
Y1 - 1991
N2 - A dynamic memory cell is described in which charge is stored on the gate capacitance of a MOS transistor rather than on a discrete capacitor. This transistor is used as an amplifying device, so that the output charge is much greater than the charge stored in the cell. The memory cell can be scaled down without performance loss.
AB - A dynamic memory cell is described in which charge is stored on the gate capacitance of a MOS transistor rather than on a discrete capacitor. This transistor is used as an amplifying device, so that the output charge is much greater than the charge stored in the cell. The memory cell can be scaled down without performance loss.
UR - http://www.scopus.com/inward/record.url?scp=84907714342&partnerID=8YFLogxK
M3 - Conference contribution
AN - SCOPUS:84907714342
T3 - European Solid-State Device Research Conference
SP - 367
EP - 370
BT - European Solid-State Device Research Conference
A2 - Ilegems, M.
A2 - Dutoit, M.
PB - IEEE Computer Society
T2 - 21st European Solid State Device Research Conference, ESSDERC 1991
Y2 - 16 September 1991 through 19 September 1991
ER -