TY - JOUR
T1 - Fully scalable gain memory cell for future drams
AU - Krautschneider, W. H.
AU - Risch, L.
AU - Lau, K.
AU - Schmitt-Landsiedel, D.
PY - 1991/10
Y1 - 1991/10
N2 - A dynamic memory cell is described in which charge is stored on the gate capacitance of a MOS transistor rather than on a discrete capacitor. This transistor is used as an amplifying device, so that the output charge is much greater than the charge stored in the cell. The memory cell can be scaled down without performance loss.
AB - A dynamic memory cell is described in which charge is stored on the gate capacitance of a MOS transistor rather than on a discrete capacitor. This transistor is used as an amplifying device, so that the output charge is much greater than the charge stored in the cell. The memory cell can be scaled down without performance loss.
UR - http://www.scopus.com/inward/record.url?scp=0026238328&partnerID=8YFLogxK
U2 - 10.1016/0167-9317(91)90246-A
DO - 10.1016/0167-9317(91)90246-A
M3 - Article
AN - SCOPUS:0026238328
SN - 0167-9317
VL - 15
SP - 367
EP - 370
JO - Microelectronic Engineering
JF - Microelectronic Engineering
IS - 1-4
ER -