TY - JOUR
T1 - From roadmaps to reality
T2 - The challenges of designing tomorrow's chips
AU - Herbst, Heiner
AU - Schmitt-Landsiedel, Doris
AU - Schöbinger, Matthias
PY - 1996
Y1 - 1996
N2 - Ever smaller structures and ever greater numbers of semiconductor elements on a single chip call for a growing level of interdisciplinary creativity among chip and system developers. Also required are measures designed to significantly reduce the power dissipation associated with each function, even as clock rates accelerate. As integration increases, another requirement is to integrate combinations of analog and digital circuits on a single chip.
AB - Ever smaller structures and ever greater numbers of semiconductor elements on a single chip call for a growing level of interdisciplinary creativity among chip and system developers. Also required are measures designed to significantly reduce the power dissipation associated with each function, even as clock rates accelerate. As integration increases, another requirement is to integrate combinations of analog and digital circuits on a single chip.
UR - http://www.scopus.com/inward/record.url?scp=0030282999&partnerID=8YFLogxK
U2 - 10.1080/02564602.1996.11416630
DO - 10.1080/02564602.1996.11416630
M3 - Article
AN - SCOPUS:0030282999
SN - 0256-4602
VL - 13
SP - 345
EP - 349
JO - IETE Technical Review (Institution of Electronics and Telecommunication Engineers, India)
JF - IETE Technical Review (Institution of Electronics and Telecommunication Engineers, India)
IS - 6
ER -