Four-phase power clock generator for adiabatic logic circuits

A. Bargagli-Stoffi; G. Iannaccone; S. Di Pascoli; E. Amirante; D. Schmitt-Landsiedel

doi:10.1049/el:20020523

Four-phase power clock generator for adiabatic logic circuits

A. Bargagli-Stoffi
, G. Iannaccone
, S. Di Pascoli
, E. Amirante
, D. Schmitt-Landsiedel

Medicine and Health

Technical University of Munich

Research output: Contribution to journal › Article › peer-review

20 Scopus citations

Abstract

A circuit for a four-phase trapezoidal power clock generator for adiabatic logic circuits realised with a double-well 0.25 μm CMOS technology and external inductors is proposed. The circuit, at a frequency of 7 MHz which is within the optimum frequency range for adiabatic circuits realised with 0.25 μm CMOS technology, has a conversion efficiency higher than 80%, and is robust with respect to parameter variations.

Original language	English
Pages (from-to)	689-690
Number of pages	2
Journal	Electronics Letters
Volume	38
Issue number	14
DOIs	https://doi.org/10.1049/el:20020523
State	Published - 4 Jul 2002

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10.1049/el:20020523

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abstract = "A circuit for a four-phase trapezoidal power clock generator for adiabatic logic circuits realised with a double-well 0.25 μm CMOS technology and external inductors is proposed. The circuit, at a frequency of 7 MHz which is within the optimum frequency range for adiabatic circuits realised with 0.25 μm CMOS technology, has a conversion efficiency higher than 80\%, and is robust with respect to parameter variations.",

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AU - Bargagli-Stoffi, A.

AU - Iannaccone, G.

AU - Di Pascoli, S.

AU - Amirante, E.

AU - Schmitt-Landsiedel, D.

PY - 2002/7/4

Y1 - 2002/7/4

N2 - A circuit for a four-phase trapezoidal power clock generator for adiabatic logic circuits realised with a double-well 0.25 μm CMOS technology and external inductors is proposed. The circuit, at a frequency of 7 MHz which is within the optimum frequency range for adiabatic circuits realised with 0.25 μm CMOS technology, has a conversion efficiency higher than 80%, and is robust with respect to parameter variations.

AB - A circuit for a four-phase trapezoidal power clock generator for adiabatic logic circuits realised with a double-well 0.25 μm CMOS technology and external inductors is proposed. The circuit, at a frequency of 7 MHz which is within the optimum frequency range for adiabatic circuits realised with 0.25 μm CMOS technology, has a conversion efficiency higher than 80%, and is robust with respect to parameter variations.

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DO - 10.1049/el:20020523

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JO - Electronics Letters

JF - Electronics Letters

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ER -

Four-phase power clock generator for adiabatic logic circuits

Abstract

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