TY - JOUR
T1 - Flow-Based Microfluidic Biochips with Distributed Channel Storage
T2 - Synthesis, Physical Design, and Wash Optimization
AU - Huang, Xing
AU - Guo, Wenzhong
AU - Chen, Zhisheng
AU - Li, Bing
AU - Ho, Tsung Yi
AU - Schlichtmann, Ulf
N1 - Publisher Copyright:
© 1968-2012 IEEE.
PY - 2022/2/1
Y1 - 2022/2/1
N2 - System-architecture design optimization of flow-based microfluidic biochips has been extensively investigated over the past decade. Most of the prior work, however, is still based on chip architectures with dedicated storage units and this, not only limits the performance of biochips, but also increases their fabrication cost. To overcome this limitation, a distributed channel-storage architecture can be implemented, where fluid samples can be cached temporarily in flow channels instead of using a dedicated storage. This new concept of fluid storage, however, requires a careful arrangement of fluid samples to enable the channels to fulfill the dual functions of transportation and caching. Moreover, to avoid cross-contamination between different fluidic flows, wash operations are necessary to remove the residue left in flow channels. In this article, we formulate the first practical system level design and wash optimization problem for microfluidic biochips with distributed channel storage architecture, considering high-level synthesis, physical design, and wash optimization simultaneously, and present a top-down design flow to solve this problem systematically. Given the protocol of a biochemical application and the corresponding design requirements, our goal is to generate a chip architecture with low fabrication cost. Meanwhile the biochemical application can be executed efficiently with an optimized wash scheme. Experimental results on multiple benchmarks confirm that our approach leads to short completion time of biochemical applications, low chip cost, as well as high wash efficiency.
AB - System-architecture design optimization of flow-based microfluidic biochips has been extensively investigated over the past decade. Most of the prior work, however, is still based on chip architectures with dedicated storage units and this, not only limits the performance of biochips, but also increases their fabrication cost. To overcome this limitation, a distributed channel-storage architecture can be implemented, where fluid samples can be cached temporarily in flow channels instead of using a dedicated storage. This new concept of fluid storage, however, requires a careful arrangement of fluid samples to enable the channels to fulfill the dual functions of transportation and caching. Moreover, to avoid cross-contamination between different fluidic flows, wash operations are necessary to remove the residue left in flow channels. In this article, we formulate the first practical system level design and wash optimization problem for microfluidic biochips with distributed channel storage architecture, considering high-level synthesis, physical design, and wash optimization simultaneously, and present a top-down design flow to solve this problem systematically. Given the protocol of a biochemical application and the corresponding design requirements, our goal is to generate a chip architecture with low fabrication cost. Meanwhile the biochemical application can be executed efficiently with an optimized wash scheme. Experimental results on multiple benchmarks confirm that our approach leads to short completion time of biochemical applications, low chip cost, as well as high wash efficiency.
KW - Microfluidic biochips
KW - distributed channel-storage architecture
KW - system-level design
KW - wash optimization
UR - http://www.scopus.com/inward/record.url?scp=85100517748&partnerID=8YFLogxK
U2 - 10.1109/TC.2021.3054689
DO - 10.1109/TC.2021.3054689
M3 - Article
AN - SCOPUS:85100517748
SN - 0018-9340
VL - 71
SP - 464
EP - 478
JO - IEEE Transactions on Computers
JF - IEEE Transactions on Computers
IS - 2
ER -