TY - GEN
T1 - FlexPath NP - A network processor architecture with flexible processing paths
AU - Meitinger, Michael
AU - Ohlendorf, Rainer
AU - Wild, Thomas
AU - Herkersdorf, Andreas
PY - 2008
Y1 - 2008
N2 - In this paper we present a FlexPath Network Processor implementation, a platform with flexible, reconfigurable processing paths for packet processing. The path decision is made in hardware based on a packet's network application. Packets may be processed by a CPU or even completely in hardware. With our demonstrator the performance of different processing paths is shown for a scenario with simple IPv4 forwarding traffic mixed with IPSec packets. We show that flexible path selection significantly improves the system's performance. The specific FlexPath concepts are also applicable to other NP architectures.
AB - In this paper we present a FlexPath Network Processor implementation, a platform with flexible, reconfigurable processing paths for packet processing. The path decision is made in hardware based on a packet's network application. Packets may be processed by a CPU or even completely in hardware. With our demonstrator the performance of different processing paths is shown for a scenario with simple IPv4 forwarding traffic mixed with IPSec packets. We show that flexible path selection significantly improves the system's performance. The specific FlexPath concepts are also applicable to other NP architectures.
UR - http://www.scopus.com/inward/record.url?scp=67249120538&partnerID=8YFLogxK
U2 - 10.1109/ISSOC.2008.4694869
DO - 10.1109/ISSOC.2008.4694869
M3 - Conference contribution
AN - SCOPUS:67249120538
SN - 9781424425419
T3 - 2008 International Symposium on System-on-Chip Proceedings, SOC 2008
BT - 2008 International Symposium on System-on-Chip Proceedings, SOC 2008
T2 - 2008 International Symposium on System-on-Chip, SOC 2008
Y2 - 5 November 2008 through 6 November 2008
ER -