TY - GEN
T1 - Feeding Hungry Models Less
T2 - 3rd ACM/IEEE Workshop on Machine Learning for CAD, MLCAD 2021
AU - Last, Felix
AU - Schlichtmann, Ulf
N1 - Publisher Copyright:
© 2021 IEEE.
PY - 2021/8/30
Y1 - 2021/8/30
N2 - Supervised machine learning requires large amounts of labeled data for training. In power, performance and area (PPA) estimation of embedded memories, every new memory compiler version is considered independently of previous versions. Since the data of different memory compilers originate from similar domains, transfer learning may reduce the amount of supervised data required by pre-training PPA estimation neural networks on related domains. We show that provisioning times of PPA models for new compiler versions can be reduced significantly by exploiting similarities across versions and technology nodes. Through transfer learning, we shorten the time to provision PPA models for new compiler versions by 50% to 90%, which speeds up time-critical periods of the design cycle. This is achieved by requiring less than 6,500 ground truth samples for the target compiler to achieve average estimation errors of 0.35% instead of 13,000 samples. Using only 1,300 samples is sufficient to achieve an almost worst-case (98th percentile) error of approximately 3% and allows us to shorten model provisioning times from over 40 days to less than one week.
AB - Supervised machine learning requires large amounts of labeled data for training. In power, performance and area (PPA) estimation of embedded memories, every new memory compiler version is considered independently of previous versions. Since the data of different memory compilers originate from similar domains, transfer learning may reduce the amount of supervised data required by pre-training PPA estimation neural networks on related domains. We show that provisioning times of PPA models for new compiler versions can be reduced significantly by exploiting similarities across versions and technology nodes. Through transfer learning, we shorten the time to provision PPA models for new compiler versions by 50% to 90%, which speeds up time-critical periods of the design cycle. This is achieved by requiring less than 6,500 ground truth samples for the target compiler to achieve average estimation errors of 0.35% instead of 13,000 samples. Using only 1,300 samples is sufficient to achieve an almost worst-case (98th percentile) error of approximately 3% and allows us to shorten model provisioning times from over 40 days to less than one week.
KW - artificial neural networks
KW - deep learning
KW - electronic design automation
KW - few-shot learning
KW - machine learning
KW - memory compilers
KW - regression
KW - transfer learning
UR - http://www.scopus.com/inward/record.url?scp=85115685529&partnerID=8YFLogxK
U2 - 10.1109/MLCAD52597.2021.9531299
DO - 10.1109/MLCAD52597.2021.9531299
M3 - Conference contribution
AN - SCOPUS:85115685529
T3 - 2021 ACM/IEEE 3rd Workshop on Machine Learning for CAD, MLCAD 2021
BT - 2021 ACM/IEEE 3rd Workshop on Machine Learning for CAD, MLCAD 2021
PB - Institute of Electrical and Electronics Engineers Inc.
Y2 - 30 August 2021 through 3 September 2021
ER -