Feature-Based State Space Coverage Metric for Analog Circuit Verification

Andreas Fürtig; Sebastian Steinhorst; Lars Hedrich

doi:10.1007/978-3-319-62920-9_5

Feature-Based State Space Coverage Metric for Analog Circuit Verification

Andreas Fürtig, Sebastian Steinhorst, Lars Hedrich

Associate Professorship of Embedded Systems and Internet of Things

Johann Wolfgang Goethe University

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

Abstract

This chapter proposes a systematic and fast analog coverage-driven verification methodology which could increase the confidence in verification of today’s analog blocks. We define an appropriate coverage metric to score simulations and then minimize the simulation effort for achieving full state space coverage with an algorithm generating appropriate input stimuli. Our proposed method uses characteristic properties of a discretized representation of the state space such as the spatial distribution of eigenvalues, guiding the generation of short and purposeful stimuli. The experimental results show a significant speed-up with similar accuracy compared to the state of the art.

Original language	English
Title of host publication	Languages, Design Methods, and Tools for Electronic System Design - Selected Contributions from FDL 2016
Editors	Robert Wille, Franco Fummi
Publisher	Springer Verlag
Pages	83-101
Number of pages	19
ISBN (Print)	9783319629193
DOIs	https://doi.org/10.1007/978-3-319-62920-9_5
State	Published - 2018
Event	Forum on specification and Design Languages, FDL 2016 - Bremen, Germany Duration: 14 Sep 2016 → 16 Sep 2016

Publication series

Name	Lecture Notes in Electrical Engineering
Volume	454
ISSN (Print)	1876-1100
ISSN (Electronic)	1876-1119

Conference

Conference	Forum on specification and Design Languages, FDL 2016
Country/Territory	Germany
City	Bremen
Period	14/09/16 → 16/09/16

Keywords

Analog circuit verification
Analog coverage
Coverage
State space analysis
State space coverage
State space discretization

Access to Document

10.1007/978-3-319-62920-9_5

Cite this

Fürtig, A., Steinhorst, S., & Hedrich, L. (2018). Feature-Based State Space Coverage Metric for Analog Circuit Verification. In R. Wille, & F. Fummi (Eds.), Languages, Design Methods, and Tools for Electronic System Design - Selected Contributions from FDL 2016 (pp. 83-101). (Lecture Notes in Electrical Engineering; Vol. 454). Springer Verlag. https://doi.org/10.1007/978-3-319-62920-9_5

@inproceedings{a288c85e91f444c9b1186563dbbf07f8,

title = "Feature-Based State Space Coverage Metric for Analog Circuit Verification",

abstract = "This chapter proposes a systematic and fast analog coverage-driven verification methodology which could increase the confidence in verification of today{\textquoteright}s analog blocks. We define an appropriate coverage metric to score simulations and then minimize the simulation effort for achieving full state space coverage with an algorithm generating appropriate input stimuli. Our proposed method uses characteristic properties of a discretized representation of the state space such as the spatial distribution of eigenvalues, guiding the generation of short and purposeful stimuli. The experimental results show a significant speed-up with similar accuracy compared to the state of the art.",

keywords = "Analog circuit verification, Analog coverage, Coverage, State space analysis, State space coverage, State space discretization",

author = "Andreas F{\"u}rtig and Sebastian Steinhorst and Lars Hedrich",

note = "Publisher Copyright: {\textcopyright} 2018, Springer International Publishing AG.; Forum on specification and Design Languages, FDL 2016 ; Conference date: 14-09-2016 Through 16-09-2016",

year = "2018",

doi = "10.1007/978-3-319-62920-9_5",

language = "English",

isbn = "9783319629193",

series = "Lecture Notes in Electrical Engineering",

publisher = "Springer Verlag",

pages = "83--101",

editor = "Robert Wille and Franco Fummi",

booktitle = "Languages, Design Methods, and Tools for Electronic System Design - Selected Contributions from FDL 2016",

}

Fürtig, A, Steinhorst, S & Hedrich, L 2018, Feature-Based State Space Coverage Metric for Analog Circuit Verification. in R Wille & F Fummi (eds), Languages, Design Methods, and Tools for Electronic System Design - Selected Contributions from FDL 2016. Lecture Notes in Electrical Engineering, vol. 454, Springer Verlag, pp. 83-101, Forum on specification and Design Languages, FDL 2016, Bremen, Germany, 14/09/16. https://doi.org/10.1007/978-3-319-62920-9_5

Feature-Based State Space Coverage Metric for Analog Circuit Verification. / Fürtig, Andreas; Steinhorst, Sebastian; Hedrich, Lars.
Languages, Design Methods, and Tools for Electronic System Design - Selected Contributions from FDL 2016. ed. / Robert Wille; Franco Fummi. Springer Verlag, 2018. p. 83-101 (Lecture Notes in Electrical Engineering; Vol. 454).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - Feature-Based State Space Coverage Metric for Analog Circuit Verification

AU - Fürtig, Andreas

AU - Steinhorst, Sebastian

AU - Hedrich, Lars

PY - 2018

Y1 - 2018

N2 - This chapter proposes a systematic and fast analog coverage-driven verification methodology which could increase the confidence in verification of today’s analog blocks. We define an appropriate coverage metric to score simulations and then minimize the simulation effort for achieving full state space coverage with an algorithm generating appropriate input stimuli. Our proposed method uses characteristic properties of a discretized representation of the state space such as the spatial distribution of eigenvalues, guiding the generation of short and purposeful stimuli. The experimental results show a significant speed-up with similar accuracy compared to the state of the art.

AB - This chapter proposes a systematic and fast analog coverage-driven verification methodology which could increase the confidence in verification of today’s analog blocks. We define an appropriate coverage metric to score simulations and then minimize the simulation effort for achieving full state space coverage with an algorithm generating appropriate input stimuli. Our proposed method uses characteristic properties of a discretized representation of the state space such as the spatial distribution of eigenvalues, guiding the generation of short and purposeful stimuli. The experimental results show a significant speed-up with similar accuracy compared to the state of the art.

KW - Analog circuit verification

KW - Analog coverage

KW - Coverage

KW - State space analysis

KW - State space coverage

KW - State space discretization

UR - http://www.scopus.com/inward/record.url?scp=85034415858&partnerID=8YFLogxK

U2 - 10.1007/978-3-319-62920-9_5

DO - 10.1007/978-3-319-62920-9_5

M3 - Conference contribution

AN - SCOPUS:85034415858

SN - 9783319629193

T3 - Lecture Notes in Electrical Engineering

SP - 83

EP - 101

BT - Languages, Design Methods, and Tools for Electronic System Design - Selected Contributions from FDL 2016

A2 - Wille, Robert

A2 - Fummi, Franco

PB - Springer Verlag

T2 - Forum on specification and Design Languages, FDL 2016

Y2 - 14 September 2016 through 16 September 2016

ER -

Feature-Based State Space Coverage Metric for Analog Circuit Verification

Abstract

Publication series

Conference

Keywords

Access to Document

Other files and links

Fingerprint

Cite this