TY - GEN
T1 - Fault injection at host-compiled level with static fault set reduction for SoC firmware robustness testing
AU - Maier, Petra R.
AU - Kleeberger, Veit
AU - Mueller-Gritschneder, Daniel
AU - Schlichtmann, Ulf
N1 - Publisher Copyright:
© 2016 ACM.
PY - 2016/11/21
Y1 - 2016/11/21
N2 - Decreasing hardware reliability makes robust firmware imperative for safety-critical applications. Hence, ensuring correct handling of errors in peripherals is a key objective during firmware design. To adequately support robustness considerations of firmware designers during implementation, an efficient qualitative fault injection method is required. This paper presents a high-speed fault injection technique based on host-compiled firmware simulation that is suitable to analyze the impact of transient faults on firmware behavior. Additionally, fault set reduction by static code analysis avoids unnecessary injection of masked and equivalent faults. Application of the proposed fault injection technique on an industrial safety-relevant automotive system-on-chip (SoC) firmware demonstrates at least three orders of magnitude speedup compared to instruction set level. In addition, a fault set reduction by 78% is achieved. While significantly reducing the required fault injection time, the presented techniques provide as accurate feedback to the designer as existing state-of-the-art approaches.
AB - Decreasing hardware reliability makes robust firmware imperative for safety-critical applications. Hence, ensuring correct handling of errors in peripherals is a key objective during firmware design. To adequately support robustness considerations of firmware designers during implementation, an efficient qualitative fault injection method is required. This paper presents a high-speed fault injection technique based on host-compiled firmware simulation that is suitable to analyze the impact of transient faults on firmware behavior. Additionally, fault set reduction by static code analysis avoids unnecessary injection of masked and equivalent faults. Application of the proposed fault injection technique on an industrial safety-relevant automotive system-on-chip (SoC) firmware demonstrates at least three orders of magnitude speedup compared to instruction set level. In addition, a fault set reduction by 78% is achieved. While significantly reducing the required fault injection time, the presented techniques provide as accurate feedback to the designer as existing state-of-the-art approaches.
KW - Fault injection
KW - SoC
KW - fault set reduction
KW - firmware
KW - host-compiled simulation
KW - robustness
KW - static code analysis
UR - http://www.scopus.com/inward/record.url?scp=85006897500&partnerID=8YFLogxK
U2 - 10.1145/2968456.2968463
DO - 10.1145/2968456.2968463
M3 - Conference contribution
AN - SCOPUS:85006897500
T3 - 2016 International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2016
BT - 2016 International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2016
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2016 International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2016
Y2 - 2 October 2016 through 7 October 2016
ER -