TY - GEN
T1 - Fast stability analysis of large-scale SRAM arrays and the impact of NBTI degradation
AU - Drapatz, Stefan
AU - Fischer, Thomas
AU - Hofmann, Karl
AU - Amirante, Ettore
AU - Huber, Peter
AU - Ostermayr, Martin
AU - Georgakos, Georg
AU - Schmitt-Landsiedel, Doris
PY - 2009
Y1 - 2009
N2 - This paper presents Read Margin analysis for large SRAM arrays with a fast test method that even can be realized in dual-VDD product chips. Classical Static Noise Margin (SNM) is mostly suitable for single-cell simulation. Read Margin (RM) measurement allows analysis of large arrays and correlates to SNM, but requires a dedicated teststructure and long measurement time. The presented method analyzes the flipping of cells over varying supply voltage. The stability of large arrays can be characterized in read as well as in hold state depending on the state of the access transistors. Applying this method, the impact of Negative Bias Temperature Instability (NBTI) is demonstrated on both Read and Hold Margin in a 65 nm low power technology.
AB - This paper presents Read Margin analysis for large SRAM arrays with a fast test method that even can be realized in dual-VDD product chips. Classical Static Noise Margin (SNM) is mostly suitable for single-cell simulation. Read Margin (RM) measurement allows analysis of large arrays and correlates to SNM, but requires a dedicated teststructure and long measurement time. The presented method analyzes the flipping of cells over varying supply voltage. The stability of large arrays can be characterized in read as well as in hold state depending on the state of the access transistors. Applying this method, the impact of Negative Bias Temperature Instability (NBTI) is demonstrated on both Read and Hold Margin in a 65 nm low power technology.
UR - http://www.scopus.com/inward/record.url?scp=72849141697&partnerID=8YFLogxK
U2 - 10.1109/ESSCIRC.2009.5325952
DO - 10.1109/ESSCIRC.2009.5325952
M3 - Conference contribution
AN - SCOPUS:72849141697
SN - 9781424443536
T3 - ESSCIRC 2009 - Proceedings of the 35th European Solid-State Circuits Conference
SP - 92
EP - 95
BT - ESSCIRC 2009 - Proceedings of the 35th European Solid-State Circuits Conference
T2 - 35th European Solid-State Circuits Conference, ESSCIRC 2009
Y2 - 14 September 2009 through 18 September 2009
ER -