Fast stability analysis of large-scale SRAM arrays and the impact of NBTI degradation

Stefan Drapatz, Thomas Fischer, Karl Hofmann, Ettore Amirante, Peter Huber, Martin Ostermayr, Georg Georgakos, Doris Schmitt-Landsiedel

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

6 Scopus citations

Abstract

This paper presents Read Margin analysis for large SRAM arrays with a fast test method that even can be realized in dual-VDD product chips. Classical Static Noise Margin (SNM) is mostly suitable for single-cell simulation. Read Margin (RM) measurement allows analysis of large arrays and correlates to SNM, but requires a dedicated teststructure and long measurement time. The presented method analyzes the flipping of cells over varying supply voltage. The stability of large arrays can be characterized in read as well as in hold state depending on the state of the access transistors. Applying this method, the impact of Negative Bias Temperature Instability (NBTI) is demonstrated on both Read and Hold Margin in a 65 nm low power technology.

Original languageEnglish
Title of host publicationESSCIRC 2009 - Proceedings of the 35th European Solid-State Circuits Conference
Pages92-95
Number of pages4
DOIs
StatePublished - 2009
Event35th European Solid-State Circuits Conference, ESSCIRC 2009 - Athens, Greece
Duration: 14 Sep 200918 Sep 2009

Publication series

NameESSCIRC 2009 - Proceedings of the 35th European Solid-State Circuits Conference

Conference

Conference35th European Solid-State Circuits Conference, ESSCIRC 2009
Country/TerritoryGreece
CityAthens
Period14/09/0918/09/09

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