TY - GEN
T1 - Extremely low-power logic
AU - Piguet, Christian
AU - Gautier, Jacques
AU - Heer, Christoph
AU - O'Connor, Ian
AU - Schlichtmann, U.
PY - 2004
Y1 - 2004
N2 - For extremely Low-power Logic, three very new and promising techniques will be described. The first are methods on circuit and system level for reduced supply voltages. In large logic blocks, interconnect becomes a main issue, that could be solved by on-chip optical interconnect. Nano-devices will also be presented, as a possibility to compute with nearly zero power, and compared to future 10 nanometers transistors.
AB - For extremely Low-power Logic, three very new and promising techniques will be described. The first are methods on circuit and system level for reduced supply voltages. In large logic blocks, interconnect becomes a main issue, that could be solved by on-chip optical interconnect. Nano-devices will also be presented, as a possibility to compute with nearly zero power, and compared to future 10 nanometers transistors.
UR - http://www.scopus.com/inward/record.url?scp=3042561719&partnerID=8YFLogxK
U2 - 10.1109/DATE.2004.1268919
DO - 10.1109/DATE.2004.1268919
M3 - Conference contribution
AN - SCOPUS:3042561719
SN - 0769520855
SN - 9780769520858
T3 - Proceedings - Design, Automation and Test in Europe Conference and Exhibition
SP - 656
EP - 661
BT - Proceedings - Design, Automation and Test in Europe Conference and Exhibition, DATE 04
A2 - Gielen, G.
A2 - Figueras, J.
T2 - Proceedings - Design, Automation and Test in Europe Conference and Exhibition, DATE 04
Y2 - 16 February 2004 through 20 February 2004
ER -