Extremely low-power logic

Christian Piguet, Jacques Gautier, Christoph Heer, Ian O'Connor, U. Schlichtmann

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

10 Scopus citations

Abstract

For extremely Low-power Logic, three very new and promising techniques will be described. The first are methods on circuit and system level for reduced supply voltages. In large logic blocks, interconnect becomes a main issue, that could be solved by on-chip optical interconnect. Nano-devices will also be presented, as a possibility to compute with nearly zero power, and compared to future 10 nanometers transistors.

Original languageEnglish
Title of host publicationProceedings - Design, Automation and Test in Europe Conference and Exhibition, DATE 04
EditorsG. Gielen, J. Figueras
Pages656-661
Number of pages6
DOIs
StatePublished - 2004
EventProceedings - Design, Automation and Test in Europe Conference and Exhibition, DATE 04 - Paris, France
Duration: 16 Feb 200420 Feb 2004

Publication series

NameProceedings - Design, Automation and Test in Europe Conference and Exhibition
Volume1

Conference

ConferenceProceedings - Design, Automation and Test in Europe Conference and Exhibition, DATE 04
Country/TerritoryFrance
CityParis
Period16/02/0420/02/04

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