@inproceedings{df8ab804f5aa480484ad87134d3173e9,
title = "Extending a highly parallel data mining algorithm to the intel {\textregistered} many integrated core architecture",
abstract = "Extracting knowledge from vast datasets is a major challenge in data-driven applications, such as classification and regression, which are mostly compute bound. In this paper, we extend our SG + + algorithm to the Intel{\textregistered} Many Integrated Core Architecture (Intel{\textregistered} MIC Architecture). The ease of porting an application to Intel MIC Architecture is shown: porting existing SSE code is very easy and straightforward. We evaluate the current prototype pre-release coprocessor board codenamed Intel{\textregistered} {"}Knights Ferry{"}. We utilize the pragma-based offloading programming model offered by the Intel{\textregistered} Composer XE for Intel MIC Architecture, generating both the host and the coprocessor code. We compare the achieved performance with an NVIDIA C2050 accelerator and show that the pre-release Knights Ferry coprocessor delivers better performance than the C2050 and exceeds the C2050 when comparing the productivity aspect of implementing algorithms for the coprocessors.",
keywords = "GPGPU, NVIDIA Fermi, accelerators, coprocessors, data mining, sparse grids",
author = "Alexander Heinecke and Michael Klemm and Dirk Pfl{\"u}ger and Arndt Bode and Bungartz, {Hans Joachim}",
year = "2012",
doi = "10.1007/978-3-642-29740-3_42",
language = "English",
isbn = "9783642297397",
series = "Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)",
publisher = "Springer Verlag",
number = "PART 2",
pages = "375--384",
booktitle = "Euro-Par 2011",
edition = "PART 2",
note = "17th Parallel Processing Workshops, Euro-Par 2011: CCPI 2011, CGWS 2011, HeteroPar 2011, HiBB 2011, HPCVirt 2011, HPPC 2011, HPSS 2011, MDGS 2011, ProPer 2011, Resilience 2011, UCHPC 2011, VHPC 2011 ; Conference date: 29-08-2011 Through 02-09-2011",
}