TY - GEN
T1 - Exploiting Bus Communication to Improve Cache Attacks on Systems-on-Chips
AU - Sepulveda, Johanna
AU - Gross, Mathieu
AU - Zankl, Andreas
AU - Sigl, Georg
N1 - Publisher Copyright:
© 2017 IEEE.
PY - 2017/7/20
Y1 - 2017/7/20
N2 - Systems-on-Chips (SoCs) are one of the key enabling technologies for the Internet-of-Things (IoT). Given the continuous distribution of IoT devices, data confidentiality and user privacy are of utmost importance. However, with the growing complexity of SoCs, the risk of malware infections and trojans introduced at design time increases significantly. A vital threat to system security are so-called side-channel attacks based on cache observations. While mainly studied on desktop and server systems, recent publications have analyzed cache attacks on mobile devices and network-on-chip platforms. In this work, we investigate cache attacks on System-on-Chips implementing bus based communication. To this end, we present two contributions. First, we demonstrate an improved Prime+Probe based cache attack on AES-128 that, for the first time, exploits the bus communication to increase its efficiency. Second, we integrate two countermeasures (Shuffling and Mini-table) and evaluate their impact on the attack. The results show that our improved attack recovers the full key twice as fast as Prime+Probe without exploiting bus communication. Moreover, we propose protection techniques that are feasible and effectively mitigate both original and improved attack.
AB - Systems-on-Chips (SoCs) are one of the key enabling technologies for the Internet-of-Things (IoT). Given the continuous distribution of IoT devices, data confidentiality and user privacy are of utmost importance. However, with the growing complexity of SoCs, the risk of malware infections and trojans introduced at design time increases significantly. A vital threat to system security are so-called side-channel attacks based on cache observations. While mainly studied on desktop and server systems, recent publications have analyzed cache attacks on mobile devices and network-on-chip platforms. In this work, we investigate cache attacks on System-on-Chips implementing bus based communication. To this end, we present two contributions. First, we demonstrate an improved Prime+Probe based cache attack on AES-128 that, for the first time, exploits the bus communication to increase its efficiency. Second, we integrate two countermeasures (Shuffling and Mini-table) and evaluate their impact on the attack. The results show that our improved attack recovers the full key twice as fast as Prime+Probe without exploiting bus communication. Moreover, we propose protection techniques that are feasible and effectively mitigate both original and improved attack.
KW - Access-driven
KW - Bus
KW - Cache Attack
KW - Security
KW - SoCs
UR - http://www.scopus.com/inward/record.url?scp=85027278206&partnerID=8YFLogxK
U2 - 10.1109/ISVLSI.2017.57
DO - 10.1109/ISVLSI.2017.57
M3 - Conference contribution
AN - SCOPUS:85027278206
T3 - Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI
SP - 284
EP - 289
BT - Proceedings - 2017 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2017
A2 - Reis, Ricardo
A2 - Stan, Mircea
A2 - Huebner, Michael
A2 - Voros, Nikolaos
PB - IEEE Computer Society
T2 - 2017 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2017
Y2 - 3 July 2017 through 5 July 2017
ER -