TY - GEN
T1 - Expert Knowledge-based Segmentation Algorithm for IC Layout SEM Images
AU - Lippmann, Bernhard
AU - Mutter, Johannes
AU - Sigl, Georg
N1 - Publisher Copyright:
© 2024 IEEE.
PY - 2024
Y1 - 2024
N2 - This paper will introduce a novel image processing algorithm based on expert knowledge of SEM (Scanning Electron Microscope) image segmentation of integrated circuit (IC) layouts. Our approach incorporates chip design phase-derived features and SEM microscope image characteristics, enabling high-accuracy and efficient image segmentation. To demonstrate the effectiveness of our approach, we present a comprehensive evaluation of our approach through a series of real analysis scenarios. We conduct a comparative analysis of our proposed algorithm against existing state-of-the-art (SOTA) methodologies for this task. By doing so, we will highlight the advantages of our approach and demonstrate its potential to enhance the accuracy of IC layout segmentation, streamline the verification process, and enhance confidence in the outcomes.
AB - This paper will introduce a novel image processing algorithm based on expert knowledge of SEM (Scanning Electron Microscope) image segmentation of integrated circuit (IC) layouts. Our approach incorporates chip design phase-derived features and SEM microscope image characteristics, enabling high-accuracy and efficient image segmentation. To demonstrate the effectiveness of our approach, we present a comprehensive evaluation of our approach through a series of real analysis scenarios. We conduct a comparative analysis of our proposed algorithm against existing state-of-the-art (SOTA) methodologies for this task. By doing so, we will highlight the advantages of our approach and demonstrate its potential to enhance the accuracy of IC layout segmentation, streamline the verification process, and enhance confidence in the outcomes.
KW - hardware reverse engineering
KW - image segmentation
KW - physical verification
KW - scanning electron microscopy
UR - http://www.scopus.com/inward/record.url?scp=85216556670&partnerID=8YFLogxK
U2 - 10.1109/PAINE62042.2024.10792761
DO - 10.1109/PAINE62042.2024.10792761
M3 - Conference contribution
AN - SCOPUS:85216556670
T3 - 2024 IEEE Physical Assurance and Inspection of Electronics, PAINE 2024
BT - 2024 IEEE Physical Assurance and Inspection of Electronics, PAINE 2024
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2024 IEEE Physical Assurance and Inspection of Electronics, PAINE 2024
Y2 - 12 November 2024 through 14 November 2024
ER -