Evaluating schedulers for multimedia processing on buffer-constrained SoC platforms

Alexander Maxiaguine, Samarjit Chakraborty, Simon Künzli, Lothar Thiele

Research output: Contribution to journalArticlepeer-review

11 Scopus citations

Abstract

Scheduling on-chip resources using analytical technques is becoming increasingly important in multimedia processing. This article presents an analytical framework for designing and evaluating schedulers for SoC multimedia platforms. The modeling technique subsumes standards event models used in real-time scheduling and accurately captures the variability in task execution requirements.

Original languageEnglish
Pages (from-to)368-377
Number of pages10
JournalIEEE Design and Test of Computers
Volume21
Issue number5
DOIs
StatePublished - Sep 2004
Externally publishedYes

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