TY - GEN
T1 - Evaluating and mitigating degradation effects in multimedia circuits
AU - Amrouch, Hussam
AU - Henkel, G.
N1 - Publisher Copyright:
© 2017 ACM.
PY - 2017/10/15
Y1 - 2017/10/15
N2 - The nano-CMOS era continuously introduces reliability challenges with every new generation. Short-term and long-term degradation effects due to temperature and aging, respectively, can cause a considerable increase in the delay of a circuit and hence timing errors due to path violations. To overcome such degradations, designers inevitably need to employ wide timing guardbands manifest as reduced efficiency and performance. In fact, narrowing guardbands is one of the key optimization goals in current and upcoming technology nodes. In this work, we investigate whether do designers really need to employ guardbands even in error-tolerant (e.g., multimedia) circuits? This investigation enables us to trade off guardbands with quality. In addition, we demonstrate how our proposed degradation-aware cell libraries, degradation-aware timing analysis and degradation-aware logic synthesis are indispensable, not only to link the physical level with the system level (i.e. quantifying the final impact of degradation effects on the quality of processed images) but also to increase effectively the resiliency of circuits against degradations.
AB - The nano-CMOS era continuously introduces reliability challenges with every new generation. Short-term and long-term degradation effects due to temperature and aging, respectively, can cause a considerable increase in the delay of a circuit and hence timing errors due to path violations. To overcome such degradations, designers inevitably need to employ wide timing guardbands manifest as reduced efficiency and performance. In fact, narrowing guardbands is one of the key optimization goals in current and upcoming technology nodes. In this work, we investigate whether do designers really need to employ guardbands even in error-tolerant (e.g., multimedia) circuits? This investigation enables us to trade off guardbands with quality. In addition, we demonstrate how our proposed degradation-aware cell libraries, degradation-aware timing analysis and degradation-aware logic synthesis are indispensable, not only to link the physical level with the system level (i.e. quantifying the final impact of degradation effects on the quality of processed images) but also to increase effectively the resiliency of circuits against degradations.
UR - http://www.scopus.com/inward/record.url?scp=85039918519&partnerID=8YFLogxK
U2 - 10.1145/3139315.3143527
DO - 10.1145/3139315.3143527
M3 - Conference contribution
AN - SCOPUS:85039918519
T3 - Proceedings of the 15th IEEE/ACM Symposium on Embedded Systems for Real-Time Multimedia, ESTIMedia 2017
SP - 61
EP - 67
BT - Proceedings of the 15th IEEE/ACM Symposium on Embedded Systems for Real-Time Multimedia, ESTIMedia 2017
A2 - Stuijk, Sander
A2 - Kumar, Akash
PB - Association for Computing Machinery, Inc
T2 - 15th IEEE/ACM Symposium on Embedded Systems for Real-Time Multimedia, ESTIMedia 2017
Y2 - 19 October 2017
ER -