TY - GEN
T1 - Energy of CDM failure for ICs on package-, wafer- And board-level
AU - Zeitlhoefler, Lena
AU - Nieden, Friedrich zur
AU - Esmark, Kai
AU - Langguth, Gernot
AU - Kreupl, Franz
N1 - Publisher Copyright:
© 2019 ESD Association. All rights reserved.
PY - 2019/9
Y1 - 2019/9
N2 - An energy-based failure is analyzed for Charged-Device-Model-like (CDM) discharges. The stress of an electrostatic discharge (ESD) element can be quantified and simulated, if the background capacitance of an IC domain is known. Differences between package-, wafer- and board-level are evaluated using the Capacitively Coupled Transmission Line Pulsing (CCTLP) method. The difference in the switching behavior of an ESD element due to capacitance relations is evaluated on package- and wafer-level.
AB - An energy-based failure is analyzed for Charged-Device-Model-like (CDM) discharges. The stress of an electrostatic discharge (ESD) element can be quantified and simulated, if the background capacitance of an IC domain is known. Differences between package-, wafer- and board-level are evaluated using the Capacitively Coupled Transmission Line Pulsing (CCTLP) method. The difference in the switching behavior of an ESD element due to capacitance relations is evaluated on package- and wafer-level.
UR - https://www.scopus.com/pages/publications/85074155358
M3 - Conference contribution
AN - SCOPUS:85074155358
T3 - Electrical Overstress/Electrostatic Discharge Symposium Proceedings
BT - Electrical Overstress/Electrostatic Discharge Symposium Proceedings 2019, EOS/ESD 2019
PB - ESD Association
T2 - 41st Annual Electrical Overstress/Electrostatic Discharge Symposium, EOS/ESD 2019
Y2 - 15 September 2019 through 20 September 2019
ER -