Efficient VLSI suited architectures for discrete wavelet transforms

S. Simon; P. Rieder; J. A. Nossek

Efficient VLSI suited architectures for discrete wavelet transforms

S. Simon, P. Rieder, J. A. Nossek

Chair of Circuit Theory and Signal Processing (2008 — 2021)

Technical University of Munich

Research output: Contribution to conference › Paper › peer-review

1 Scopus citations

Abstract

In this paper, a variety of architectures for the discrete wavelet transform (DWT) is examined to derive an efficient VLSI implementation. The comparison leads to a lattice filter structure which uses single steps of the CORDIC algorithm. Due to the modular structure of the proposed architecture, this approach is especially suited for full custom design style using module generators to automate the manual design process.

Original language	English
Pages	388-397
Number of pages	10
State	Published - 1996
Event	Proceedings of the 1996 9th IEEE Workshop on VLSI Signal Processing - San Francisco, CA, USA Duration: 30 Oct 1996 → 1 Nov 1996

Conference

Conference	Proceedings of the 1996 9th IEEE Workshop on VLSI Signal Processing
City	San Francisco, CA, USA
Period	30/10/96 → 1/11/96

Cite this

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title = "Efficient VLSI suited architectures for discrete wavelet transforms",

abstract = "In this paper, a variety of architectures for the discrete wavelet transform (DWT) is examined to derive an efficient VLSI implementation. The comparison leads to a lattice filter structure which uses single steps of the CORDIC algorithm. Due to the modular structure of the proposed architecture, this approach is especially suited for full custom design style using module generators to automate the manual design process.",

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note = "Proceedings of the 1996 9th IEEE Workshop on VLSI Signal Processing ; Conference date: 30-10-1996 Through 01-11-1996",

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AU - Rieder, P.

AU - Nossek, J. A.

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AB - In this paper, a variety of architectures for the discrete wavelet transform (DWT) is examined to derive an efficient VLSI implementation. The comparison leads to a lattice filter structure which uses single steps of the CORDIC algorithm. Due to the modular structure of the proposed architecture, this approach is especially suited for full custom design style using module generators to automate the manual design process.

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T2 - Proceedings of the 1996 9th IEEE Workshop on VLSI Signal Processing

Y2 - 30 October 1996 through 1 November 1996

ER -

Efficient VLSI suited architectures for discrete wavelet transforms

Abstract

Conference

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