Efficient realization of control logic in reversible circuits

The development of design methods for reversible circuits found significant attention in the last years. Circuits are thereby considered which - in contrast to conventional circuits - are composed of reversible gates only. This enables promising applications, e.g. for quantum computation or low-power design. The recent achievements in this domain enabled the development of synthesis approaches based on high level description languages. This emerges new research problems. In this paper, we address the problem of efficient realization of control logic in reversible circuits. So far, existing methods realize control logic with a significant amount of redundant circuit structures. An alternative is presented that avoids large parts of these redundancies by buffering the results of recurring computations in one additional circuit line. Accordingly, the proposed approach enables to realize control logic with significantly less circuit lines, while the increase of the circuit cost remains moderate - in some cases even reductions are possible. This conclusion is also confirmed by an experimental evaluation.