ecoNIC: Saving Energy Through SmartNIC-Based Load Balancing of Mixed-Critical Ethernet Traffic

In next-generation automotive, industrial, data cen-ter, and other mixed-critical networks, Ethernet is expected to power the backbone interconnect among multi-core compute nodes. On attached Network Interface Cards (NICs) Receive Side Scaling (RSS) supports the CPU in balancing workloads across cores for reduced tail latencies. However, state-of-the-art solutions are primarily designed for performance and less for energy-efficiency which will play an equally important role. For this reason we present ecoNIC, an RSS-based hardware load balancer for SmartNICs, and an agile Dynamic Voltage and Frequency Scaling (DVFS) governor, for energy-saving network processing. ecoNI C efficiently pins flow priorities to CPU core clusters, reducing the workload of select cores in the process, and dynamically adjusts their clock speed to exploit freed-up capacities and save energy. Within a cluster, it proactively redirects packet bursts of priority-separated flow bundles among available cores, or offloads them to neighbor nodes, once local resources tend to become highly loaded. The per-core energy consumption this way is reduced at the expense of low priority packet latencies, while high priority service qualities are maintained. Experimental evaluations applying real-world network traces yield energy savings of up to 37.9 % at an increase from 559 μs to 3.06 ms in low priority end-to-end tail latency compared to an even workload distribution without frequency scaling.