Early analysis tools for system-on-a-chip design

J. A. Darringer, R. A. Bergamaschi, S. Bhattacharya, D. Brand, A. Herkersdorf, J. K. Morrell, I. I. Nair, P. Sagmeister, Y. Shin

Research output: Contribution to journalArticlepeer-review

24 Scopus citations

Abstract

The paper describes the need for early analysis tools to enable developers of today's system-on-a-chip (SoC) designs to take advantage of pre-designed components, such as those found in the IBM Blue Logic® Library, and rapidly explore high-level design alternatives to meet their system requirements. We report on a new approach for developing high-level performance models for these SoC designs and outline how this performance analysis capability can be integrated into an overall environment for efficient SoC design.

Original languageEnglish
Pages (from-to)691-706
Number of pages16
JournalIBM Journal of Research and Development
Volume46
Issue number6
DOIs
StatePublished - Nov 2002
Externally publishedYes

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