TY - GEN
T1 - DiaSys
T2 - 29th International Conference on Architecture of Computing Systems, ARCS 2016
AU - Wagner, Philipp
AU - Wild, Thomas
AU - Herkersdorf, Andreas
N1 - Publisher Copyright:
© Springer International Publishing Switzerland 2016.
PY - 2016
Y1 - 2016
N2 - To find the cause of a functional or non-functional defect (bug) in software running on multi-processor System-on-Chip (MPSoC), developers need insight into the chip. For that, most of today’s SoCs have hardware tracing support. Unfortunately, insight is restricted by the insufficient off-chip bandwidth, a problem which is expected to become more severe in the future as more functionality is integrated on-chip. In this paper, we present a novel tracing system architecture, the diagnosis system “DiaSys.” It moves the analysis of the trace data from the debugging tool on a host PC into the chip, avoiding the off-chip bandwidth bottleneck. To enable on-chip processing, we propose to move away from trace data streams towards self-contained diagnosis events. These events can then be transformed on-chip by processing nodes to increase the information density, and then be transferred off-chip with less bandwidth. We evaluate the concept with a prototype hardware implementation, which we use to find a functional software bug. We show that on-chip trace processing can significantly lower the off-chip bandwidth requirements, while providing insight into the software execution equal to existing tracing solutions.
AB - To find the cause of a functional or non-functional defect (bug) in software running on multi-processor System-on-Chip (MPSoC), developers need insight into the chip. For that, most of today’s SoCs have hardware tracing support. Unfortunately, insight is restricted by the insufficient off-chip bandwidth, a problem which is expected to become more severe in the future as more functionality is integrated on-chip. In this paper, we present a novel tracing system architecture, the diagnosis system “DiaSys.” It moves the analysis of the trace data from the debugging tool on a host PC into the chip, avoiding the off-chip bandwidth bottleneck. To enable on-chip processing, we propose to move away from trace data streams towards self-contained diagnosis events. These events can then be transformed on-chip by processing nodes to increase the information density, and then be transferred off-chip with less bandwidth. We evaluate the concept with a prototype hardware implementation, which we use to find a functional software bug. We show that on-chip trace processing can significantly lower the off-chip bandwidth requirements, while providing insight into the software execution equal to existing tracing solutions.
KW - Debugging
KW - MPSoC
KW - SoC architectures
KW - Tracing
UR - http://www.scopus.com/inward/record.url?scp=84962440977&partnerID=8YFLogxK
U2 - 10.1007/978-3-319-30695-7_15
DO - 10.1007/978-3-319-30695-7_15
M3 - Conference contribution
AN - SCOPUS:84962440977
SN - 9783319306940
T3 - Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
SP - 197
EP - 209
BT - Architecture of Computing Systems - 29th International Conference, ARCS 2016, Proceedings
A2 - Hannig, Frank
A2 - Fey, Dietmar
A2 - Schröder-Preikschat, Wolfgang
A2 - Teich, Jürgen
A2 - Cardoso, João M.P.
A2 - Pionteck, Thilo
PB - Springer Verlag
Y2 - 4 April 2016 through 7 April 2016
ER -