Device to Circuit Framework for Activity-Dependent NBTI Aging in Digital Circuits

A. Thirunavukkarasu; Hussam Amrouch; Jerin Joe; Nilesh Goel; Narendra Parihar; Subrat Mishra; Chetan K. Dabhi; Yogesh S. Chauhan; Jorg Henkel; Souvik Mahapatra

doi:10.1109/TED.2018.2882229

Device to Circuit Framework for Activity-Dependent NBTI Aging in Digital Circuits

A. Thirunavukkarasu, Hussam Amrouch, Jerin Joe, Nilesh Goel, Narendra Parihar, Subrat Mishra, Chetan K. Dabhi, Yogesh S. Chauhan, Jorg Henkel, Souvik Mahapatra

Research output: Contribution to journal › Article › peer-review

31 Scopus citations

Abstract

A framework is proposed for activity-dependent timing degradation due to p-FET negative bias temperature instability (NBTI) in digital circuits. A fixed-time compact model is proposed for NBTI and validated with physical model predictions for various digital circuits under different input signal slew and fan-out load conditions. The model is used to predict the timing degradation in digital circuits under arbitrary input activities. An equivalent degradation level is found that can be applied to all p-FETs in the circuit and can serve as an upper bound of degradation due to arbitrary input activity and avoid the conservative worst case dc analysis. The activity dependence is studied in microprocessors as well as arithmetic circuits under different actual workloads.

Original language	English
Article number	8563055
Pages (from-to)	316-323
Number of pages	8
Journal	IEEE Transactions on Electron Devices
Volume	66
Issue number	1
DOIs	https://doi.org/10.1109/TED.2018.2882229
State	Published - Jan 2019
Externally published	Yes

Keywords

Arbitrary input activity
compact model
digital circuits
frequency degradation
negative bias temperature instability (NBTI)

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10.1109/TED.2018.2882229

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title = "Device to Circuit Framework for Activity-Dependent NBTI Aging in Digital Circuits",

abstract = "A framework is proposed for activity-dependent timing degradation due to p-FET negative bias temperature instability (NBTI) in digital circuits. A fixed-time compact model is proposed for NBTI and validated with physical model predictions for various digital circuits under different input signal slew and fan-out load conditions. The model is used to predict the timing degradation in digital circuits under arbitrary input activities. An equivalent degradation level is found that can be applied to all p-FETs in the circuit and can serve as an upper bound of degradation due to arbitrary input activity and avoid the conservative worst case dc analysis. The activity dependence is studied in microprocessors as well as arithmetic circuits under different actual workloads.",

keywords = "Arbitrary input activity, compact model, digital circuits, frequency degradation, negative bias temperature instability (NBTI)",

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AU - Thirunavukkarasu, A.

AU - Amrouch, Hussam

AU - Joe, Jerin

AU - Goel, Nilesh

AU - Parihar, Narendra

AU - Mishra, Subrat

AU - Dabhi, Chetan K.

AU - Chauhan, Yogesh S.

AU - Henkel, Jorg

AU - Mahapatra, Souvik

PY - 2019/1

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N2 - A framework is proposed for activity-dependent timing degradation due to p-FET negative bias temperature instability (NBTI) in digital circuits. A fixed-time compact model is proposed for NBTI and validated with physical model predictions for various digital circuits under different input signal slew and fan-out load conditions. The model is used to predict the timing degradation in digital circuits under arbitrary input activities. An equivalent degradation level is found that can be applied to all p-FETs in the circuit and can serve as an upper bound of degradation due to arbitrary input activity and avoid the conservative worst case dc analysis. The activity dependence is studied in microprocessors as well as arithmetic circuits under different actual workloads.

AB - A framework is proposed for activity-dependent timing degradation due to p-FET negative bias temperature instability (NBTI) in digital circuits. A fixed-time compact model is proposed for NBTI and validated with physical model predictions for various digital circuits under different input signal slew and fan-out load conditions. The model is used to predict the timing degradation in digital circuits under arbitrary input activities. An equivalent degradation level is found that can be applied to all p-FETs in the circuit and can serve as an upper bound of degradation due to arbitrary input activity and avoid the conservative worst case dc analysis. The activity dependence is studied in microprocessors as well as arithmetic circuits under different actual workloads.

KW - Arbitrary input activity

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KW - digital circuits

KW - frequency degradation

KW - negative bias temperature instability (NBTI)

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Device to Circuit Framework for Activity-Dependent NBTI Aging in Digital Circuits

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Keywords

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