Design of a systolic pattern matcher for Nanomagnet Logic

Xueming Ju, Markus Becherer, Paolo Lugli, Michael T. Niemier, Wolfgang Porod, György Csaba

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

4 Scopus citations

Abstract

Nanomagnet Logic (NML) is widely considered to be one of the promising for "beyond-CMOS" nanoscale architectures. So far only relatively simple circuits (nanomagnetic logic gates and adders) have been studied experimentally and in simulations. Here we investigate the possibility of building larger-scale computing devices from out-of-plane NML. We designed a systolic pattern matcher circuit that is in principle scalable to arbitrary number of nanomagnets and can match arbitrarily long patterns in an incoming data stream. The design of this systolic architecture for NML makes an important step toward large-scale devices.

Original languageEnglish
Title of host publication2012 15th International Workshop on Computational Electronics, IWCE 2012
DOIs
StatePublished - 2012
Event2012 15th International Workshop on Computational Electronics, IWCE 2012 - Madison, WI, United States
Duration: 22 May 201225 May 2012

Publication series

Name2012 15th International Workshop on Computational Electronics, IWCE 2012

Conference

Conference2012 15th International Workshop on Computational Electronics, IWCE 2012
Country/TerritoryUnited States
CityMadison, WI
Period22/05/1225/05/12

Keywords

  • Co/Pt nanomagnets
  • micromagnetic simulation
  • Nanomagnet Logic
  • systolic architecture

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