TY - GEN
T1 - Design and Modeling of an Interrelated System Towards a Fully Optimized Electrochemical Impedance Spectroscopy
AU - Mostafa, Islam
AU - Farouk, Amr
AU - Brederlow, Ralf
N1 - Publisher Copyright:
© 2024 IEEE.
PY - 2024
Y1 - 2024
N2 - Typically, electrochemical impedance spectroscopy (EIS) is operated by applying a stimulus voltage to an electrochemical cell. Then, the sensed signal is analyzed by an analog front-end (AFE) chain, followed by an analog-to-digital converter (ADC) for impedance characterization. Therefore, a bulky analog filter is required after the excitation mechanism to achieve a high-resolution AC stimulus voltage. This paper proposes an interrelated analog/digital EIS system to eliminate the need for this bulky analog filter. Such a filter is replaced by the already existing ADC digital filter. A direct digital synthesizer (DDS) is implemented to generate the AC stimulus voltage over a wide frequency band, from 10 Hz to 100 kHz. In addition, an ultra low- noise AFE is introduced in two modes of operation to relax the ADC design. These modes assure an optimized integrated system with the former DDS, which has a total harmonic distortion (THD) of less than 0.02 %. The AFE achieves an input-referred current noise of 8.3 fA/ √Hz, while its resolution reaches 0.48 pA over a bandwidth of 2.5 kHz. The attained resolution complies with the sensitivity requirements of EIS applications. Finally, the entire EIS system is validated using a combination of MATLAB modeling and spice simulations in 180nm CMOS technology.
AB - Typically, electrochemical impedance spectroscopy (EIS) is operated by applying a stimulus voltage to an electrochemical cell. Then, the sensed signal is analyzed by an analog front-end (AFE) chain, followed by an analog-to-digital converter (ADC) for impedance characterization. Therefore, a bulky analog filter is required after the excitation mechanism to achieve a high-resolution AC stimulus voltage. This paper proposes an interrelated analog/digital EIS system to eliminate the need for this bulky analog filter. Such a filter is replaced by the already existing ADC digital filter. A direct digital synthesizer (DDS) is implemented to generate the AC stimulus voltage over a wide frequency band, from 10 Hz to 100 kHz. In addition, an ultra low- noise AFE is introduced in two modes of operation to relax the ADC design. These modes assure an optimized integrated system with the former DDS, which has a total harmonic distortion (THD) of less than 0.02 %. The AFE achieves an input-referred current noise of 8.3 fA/ √Hz, while its resolution reaches 0.48 pA over a bandwidth of 2.5 kHz. The attained resolution complies with the sensitivity requirements of EIS applications. Finally, the entire EIS system is validated using a combination of MATLAB modeling and spice simulations in 180nm CMOS technology.
UR - http://www.scopus.com/inward/record.url?scp=85204954850&partnerID=8YFLogxK
U2 - 10.1109/MWSCAS60917.2024.10658766
DO - 10.1109/MWSCAS60917.2024.10658766
M3 - Conference contribution
AN - SCOPUS:85204954850
T3 - Midwest Symposium on Circuits and Systems
SP - 1176
EP - 1180
BT - 2024 IEEE 67th International Midwest Symposium on Circuits and Systems, MWSCAS 2024
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 67th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2024
Y2 - 11 August 2024 through 14 August 2024
ER -