Demo: fpga-ToPSS - Line-speed event processing on FPGAs

Mohammad Sadoghi; Harsh Singh; Hans Arno Jacobsen

doi:10.1145/2002259.2002316

Demo: fpga-ToPSS - Line-speed event processing on FPGAs

Mohammad Sadoghi, Harsh Singh, Hans Arno Jacobsen

University of Toronto

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

7 Scopus citations

Abstract

In this demo, we present fpga-ToPSS (a member of Toronto Publish/Subscribe System Family), an efficient event processing platform for high-frequency and low-latency algorithmic trading. Our event processing platform is built over reconfigurable hardware - FPGAs - to achieve line-rate processing. Furthermore, our event processing engine supports Boolean expression matching with an expressive predicate language that models complex financial strategies to autonomously mimic the buying and the selling of stocks based on real-time financial data.

Original language	English
Title of host publication	DEBS'11 - Proceedings of the 5th ACM International Conference on Distributed Event-Based Systems
Pages	373-374
Number of pages	2
DOIs	https://doi.org/10.1145/2002259.2002316
State	Published - 2011
Externally published	Yes
Event	5th ACM International Conference on Distributed Event-Based Systems, DEBS'11 - New York, NY, United States Duration: 11 Jul 2011 → 15 Jul 2011

Publication series

Name	DEBS'11 - Proceedings of the 5th ACM International Conference on Distributed Event-Based Systems

Conference

Conference	5th ACM International Conference on Distributed Event-Based Systems, DEBS'11
Country/Territory	United States
City	New York, NY
Period	11/07/11 → 15/07/11

Keywords

complex event processing
fpga
publish/subscribe

Access to Document

10.1145/2002259.2002316

Cite this

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title = "Demo: fpga-ToPSS - Line-speed event processing on FPGAs",

abstract = "In this demo, we present fpga-ToPSS (a member of Toronto Publish/Subscribe System Family), an efficient event processing platform for high-frequency and low-latency algorithmic trading. Our event processing platform is built over reconfigurable hardware - FPGAs - to achieve line-rate processing. Furthermore, our event processing engine supports Boolean expression matching with an expressive predicate language that models complex financial strategies to autonomously mimic the buying and the selling of stocks based on real-time financial data.",

keywords = "complex event processing, fpga, publish/subscribe",

author = "Mohammad Sadoghi and Harsh Singh and Jacobsen, {Hans Arno}",

year = "2011",

doi = "10.1145/2002259.2002316",

language = "English",

isbn = "9781450309059",

series = "DEBS'11 - Proceedings of the 5th ACM International Conference on Distributed Event-Based Systems",

pages = "373--374",

booktitle = "DEBS'11 - Proceedings of the 5th ACM International Conference on Distributed Event-Based Systems",

note = "5th ACM International Conference on Distributed Event-Based Systems, DEBS'11 ; Conference date: 11-07-2011 Through 15-07-2011",

}

Sadoghi, M, Singh, H & Jacobsen, HA 2011, Demo: fpga-ToPSS - Line-speed event processing on FPGAs. in DEBS'11 - Proceedings of the 5th ACM International Conference on Distributed Event-Based Systems. DEBS'11 - Proceedings of the 5th ACM International Conference on Distributed Event-Based Systems, pp. 373-374, 5th ACM International Conference on Distributed Event-Based Systems, DEBS'11, New York, NY, United States, 11/07/11. https://doi.org/10.1145/2002259.2002316

Demo: fpga-ToPSS - Line-speed event processing on FPGAs. / Sadoghi, Mohammad; Singh, Harsh; Jacobsen, Hans Arno.
DEBS'11 - Proceedings of the 5th ACM International Conference on Distributed Event-Based Systems. 2011. p. 373-374 (DEBS'11 - Proceedings of the 5th ACM International Conference on Distributed Event-Based Systems).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - Demo

T2 - 5th ACM International Conference on Distributed Event-Based Systems, DEBS'11

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AU - Singh, Harsh

AU - Jacobsen, Hans Arno

PY - 2011

Y1 - 2011

N2 - In this demo, we present fpga-ToPSS (a member of Toronto Publish/Subscribe System Family), an efficient event processing platform for high-frequency and low-latency algorithmic trading. Our event processing platform is built over reconfigurable hardware - FPGAs - to achieve line-rate processing. Furthermore, our event processing engine supports Boolean expression matching with an expressive predicate language that models complex financial strategies to autonomously mimic the buying and the selling of stocks based on real-time financial data.

AB - In this demo, we present fpga-ToPSS (a member of Toronto Publish/Subscribe System Family), an efficient event processing platform for high-frequency and low-latency algorithmic trading. Our event processing platform is built over reconfigurable hardware - FPGAs - to achieve line-rate processing. Furthermore, our event processing engine supports Boolean expression matching with an expressive predicate language that models complex financial strategies to autonomously mimic the buying and the selling of stocks based on real-time financial data.

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KW - fpga

KW - publish/subscribe

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U2 - 10.1145/2002259.2002316

DO - 10.1145/2002259.2002316

M3 - Conference contribution

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Y2 - 11 July 2011 through 15 July 2011

ER -

Demo: fpga-ToPSS - Line-speed event processing on FPGAs

Abstract

Publication series

Conference

Keywords

Access to Document

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