Deep Learning Strategies for Labeling and Accuracy Optimization in Microcontroller Performance Screening

In safety-critical applications, microcontrollers must be compliant with the required quality constraints and performance standards, particularly in terms of the maximum operating frequency (Fmax ). Machine learning (ML) models have proven effective in estimating Fmax by utilizing data extracted from on-chip ring oscillators (ROs), making them a valuable instrument for performance screening. However, the cost of obtaining labeled samples and the stringent accuracy needed by the model create hard challenges in this context. In order to address these, we explored three deep-learning (DL)-based key strategies: 1) semi-supervised learning with deep feature extractors: we leverage the abundance of unlabeled production data in a semi-supervised approach. Deep feature extractor models are employed to transform data into higher-dimensional spaces. These feature embeddings enable accurate performance prediction using simple linear regression, with a fraction of labeled data to reach baseline performances; 2) intrafamily transfer learning: when introducing new microcontroller products, with slightly different characteristics but the same set of ROs, previously trained deep feature extractors can be used, in a transfer learning fashion. This permits the use of significantly fewer labeled data compared to traditional methods; and 3) interfamily transfer learning: we extend the previous transfer learning concept to new microcontroller products with completely distinct characteristics. We aim to demonstrate that adapting the features set and fine-tuning DL feature extractors initially trained on specific legacy product data permits to yield better performance. Our research aims to provide a holistic framework for DL-based microcontroller performance screening to address the challenge of limited labeled data. The proposed methodologies significantly improve prediction accuracy and reduce the dependency on a large number of labeled samples, thus enhancing the efficiency and efficacy of ML-based microcontroller screening. The proposed framework enables models reuse, serving as a valuable baseline when new products are released.