Cryogenic Embedded System to Support Quantum Computing: From 5-nm FinFET to Full Processor

Paul R. Genssler, Florian Klemme, Shivendra Singh Parihar, Sebastian Brandhofer, Girish Pahwa, Ilia Polian, Yogesh Singh Chauhan, Hussam Amrouch

Research output: Contribution to journalArticlepeer-review

5 Scopus citations

Abstract

Quantum computing can enable novel algorithms infeasible for classical computers. For example, new material synthesis and drug optimization could benefit if quantum computers offered more quantum bits (qubits). One obstacle for scaling up quantum computers is the connection between their cryogenic qubits at temperatures between a few millikelvin and a few kelvin (depending on qubit type) and the classical processing system on chip (SoC) at room temperature (300). Through this connection, outside heat leaks to the qubits and can disrupt their state. Hence, moving the SoC into the cryogenic part eliminates this heat leakage. However, the cooling capacity is limited, requiring a low-power SoC, which, at the same time, has to classify qubit measurements under a tight time constraint. In this work, we explore for the first time if an off-The-shelf SoC is a plausible option for such a task. Our analysis starts with measurements of state-of-The-Art 5-nm fin-shaped field-effect transistors (FinFETs) at 10 and 300. Then, we calibrate a transistor compact model and create two standard cell libraries, one for each temperature. We perform synthesis and physical layout of a RISC-V SoC at 300 and analyze its performance at 10. Our simulations show that the SoC at 10 is plausible but lacks the performance to process more than a few thousand qubits under the time constraint.

Original languageEnglish
Article number5500611
JournalIEEE Transactions on Quantum Engineering
Volume4
DOIs
StatePublished - 2023

Keywords

  • 5-nm fin-shaped field-effect transistor (FinFET)
  • Cryogenic CMOS
  • hyperdimensional computing
  • machine learning classification
  • quantum computing
  • system on chip (SoC)

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