Computational intelligence based testing for semiconductor measurement systems

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

4 Scopus citations

Abstract

This paper describes a computational intelligence-based software configuration implemented on semiconductor automatic test equipment (ATE,) and how we can improve our design (e.g. memory test chip) based on such a method. The purpose of this unique software configuration incorporating neural network, genetic-algorithm and other artificial intelligence technologies is to enhance ATE capability and efficiency by providing an intelligent interface for a variety of functions that are controlled or monitored by the software. This includes automated and user directed control of the ATE and a diagnostic strategy to streamline test sequences and specific combinations of test conditions through the use of advanced diagnostic strategies. Such methods can achieve greater accuracy in failure diagnosis and fault prediction; and improve confidence in circuit performance testing that result in the determination of a DUT (device under test) status.

Original languageEnglish
Title of host publicationIEEE International Test Conference, Proceedings, ITC 2005
Pages906-915
Number of pages10
DOIs
StatePublished - 2005
EventIEEE International Test Conference, ITC 2005 - Austin, TX, United States
Duration: 8 Nov 200510 Nov 2005

Publication series

NameProceedings - International Test Conference
Volume2005
ISSN (Print)1089-3539

Conference

ConferenceIEEE International Test Conference, ITC 2005
Country/TerritoryUnited States
CityAustin, TX
Period8/11/0510/11/05

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