TY - GEN
T1 - Combining software and hardware LCS for lightweight on-chip learning
AU - Bernauer, Andreas
AU - Zeppenfeld, Johannes
AU - Bringmann, Oliver
AU - Herkersdorf, Andreas
AU - Rosenstiel, Wolfgang
N1 - Publisher Copyright:
© IFIP International Federation for Information Processing 2010.
PY - 2010
Y1 - 2010
N2 - In this paper we present a novel two-stage method to realize a lightweight but very capable hardware implementation of a Learning Classifier System for on-chip learning. Learning Classifier Systems (LCS) allow taking good run-time decisions, but current hardware implementations are either large or have limited learning capabilities. In this work, we combine the capabilities of a software-based LCS, the XCS, with a lightweight hardware implementation, the LCT, retaining the benefits of both. We compare our method with other LCS implementations using the multiplexer problem and evaluate it with two chip-related problems, run-time task allocation and SoC component parameterization. In all three problem sets, we find that the learning and self-adaptation capabilities are comparable to a full-fledged system, but with the added benefits of a lightweight hardware implementation, namely small area size and quick response time. Given our work, autonomous chips based on Learning Classifier Systems become feasible.
AB - In this paper we present a novel two-stage method to realize a lightweight but very capable hardware implementation of a Learning Classifier System for on-chip learning. Learning Classifier Systems (LCS) allow taking good run-time decisions, but current hardware implementations are either large or have limited learning capabilities. In this work, we combine the capabilities of a software-based LCS, the XCS, with a lightweight hardware implementation, the LCT, retaining the benefits of both. We compare our method with other LCS implementations using the multiplexer problem and evaluate it with two chip-related problems, run-time task allocation and SoC component parameterization. In all three problem sets, we find that the learning and self-adaptation capabilities are comparable to a full-fledged system, but with the added benefits of a lightweight hardware implementation, namely small area size and quick response time. Given our work, autonomous chips based on Learning Classifier Systems become feasible.
KW - Learning Classifier System
KW - System-on-Chip
KW - XCS
UR - http://www.scopus.com/inward/record.url?scp=84943535792&partnerID=8YFLogxK
U2 - 10.1007/978-3-642-15234-4_27
DO - 10.1007/978-3-642-15234-4_27
M3 - Conference contribution
AN - SCOPUS:84943535792
SN - 9783642152337
T3 - IFIP Advances in Information and Communication Technology
SP - 278
EP - 289
BT - Distributed, Parallel and Biologically Inspired Systems - 7th IFIP TC 10 Working Conference, DIPES 2010 and 3rd IFIP TC 10 International Conference, BICC 2010 Held as Part of WCC 2010, Proceedings
A2 - Hinchey, Mike
A2 - Kleinjohann, Bernd
A2 - Kleinjohann, Lisa
A2 - Lindsay P.A., Peter A.
A2 - Rammig, Franz J.
A2 - Timmis, Jon
A2 - Wolf, Marilyn
PB - Springer New York LLC
T2 - 7th IFIP TC 10 Working Conference on Distributed and Parallel Embedded Systems, DIPES 2010 and 3rd IFIP TC 10 International Conference on Biologically-Inspired Collaborative Computing, BICC 2010 Held as Part of 21st IFIP World Computer Congress, WCC 2010
Y2 - 20 September 2010 through 23 September 2010
ER -