Abstract
Hardware design using the hardware description language VHDL has to consider three independent property scales that influence the design process from an abstract level to the gate level, namely the design view, the timing aspect, and the value representation. Considering this classification, a systematic way for design steps and their verification with special emphasis on VHDL is presented in this paper.
| Original language | English |
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| Pages | 536-541 |
| Number of pages | 6 |
| State | Published - 1995 |
| Externally published | Yes |
| Event | Proceedings of the 1995 European Design Automation Conference with EURO-VHDL - Brighton, UK Duration: 18 Sep 1995 → 22 Sep 1995 |
Conference
| Conference | Proceedings of the 1995 European Design Automation Conference with EURO-VHDL |
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| City | Brighton, UK |
| Period | 18/09/95 → 22/09/95 |