Circuit resilience roadmap

Veit B. Kleeberger; Christian Weis; Ulf Schlichtmann; Norbert Wehn

doi:10.1007/978-1-4614-4078-9_7

Circuit resilience roadmap

Veit B. Kleeberger, Christian Weis, Ulf Schlichtmann, Norbert Wehn

Chair of Electronic Design Automation

Research output: Chapter in Book/Report/Conference proceeding › Chapter › peer-review

2 Scopus citations

Abstract

Technology scaling has an increasing impact on the resilience of integrated circuits. This growth is the result of (a) increasing sensitivity to various noise sources, and (b) an increase in parametric variability. This chapter examines the issue of circuit resilience by studying ongoing trends in technology scaling.Additional experiments with basic circuit blocks, such as memory or logic cells, reveal insights into their behavior for future technology generations and major threats for circuit resilience.

Original language	English
Title of host publication	Circuit Design for Reliability
Publisher	Springer New York
Pages	121-143
Number of pages	23
ISBN (Electronic)	9781461440789
ISBN (Print)	9781461440772
DOIs	https://doi.org/10.1007/978-1-4614-4078-9_7
State	Published - 1 Jan 2015

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Circuit resilience roadmap

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