CARAT – A reliability analysis framework for BTI-HCD aging in circuits

Prasad Gholve; Payel Chatterjee; Chaitanya Pasupuleti; Hussam Amrouch; Narendra Gangwar; Shouvik Das; Uma Sharma; Victor M. van Santen; Souvik Mahapatra

doi:10.1016/j.sse.2022.108586

CARAT – A reliability analysis framework for BTI-HCD aging in circuits

Prasad Gholve, Payel Chatterjee, Chaitanya Pasupuleti, Hussam Amrouch, Narendra Gangwar, Shouvik Das, Uma Sharma, Victor M. van Santen, Souvik Mahapatra

Research output: Contribution to journal › Article › peer-review

7 Scopus citations

Abstract

Circuit Aging Reliability Analysis Tool (CARAT), a framework that calculates random activity (frequency and duty) aware degradation of FETs to simulate circuit aging under real operating workloads is proposed. Bias Temperature Instability (BTI) and Hot Carrier Degradation (HCD) induced degradation of FETs is calculated in a cycle-by-cycle manner based on actual terminal waveforms grabbed from SPICE. Framework capability is demonstrated by using Level Shifter (LS) under random data-path activity, and Ring Oscillator (RO) under Dynamic Voltage Frequency Scaling (DVFS) conditions. The risk associated with the standard blanket approach is discussed.

Original language	English
Article number	108586
Journal	Solid-State Electronics
Volume	201
DOIs	https://doi.org/10.1016/j.sse.2022.108586
State	Published - Mar 2023
Externally published	Yes

Keywords

Activity awareness
BTI
DVFS
HCD
HSPICE
Level Shifter
Ring Oscillator

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10.1016/j.sse.2022.108586

Cite this

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title = "CARAT – A reliability analysis framework for BTI-HCD aging in circuits",

abstract = "Circuit Aging Reliability Analysis Tool (CARAT), a framework that calculates random activity (frequency and duty) aware degradation of FETs to simulate circuit aging under real operating workloads is proposed. Bias Temperature Instability (BTI) and Hot Carrier Degradation (HCD) induced degradation of FETs is calculated in a cycle-by-cycle manner based on actual terminal waveforms grabbed from SPICE. Framework capability is demonstrated by using Level Shifter (LS) under random data-path activity, and Ring Oscillator (RO) under Dynamic Voltage Frequency Scaling (DVFS) conditions. The risk associated with the standard blanket approach is discussed.",

keywords = "Activity awareness, BTI, DVFS, HCD, HSPICE, Level Shifter, Ring Oscillator",

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doi = "10.1016/j.sse.2022.108586",

language = "English",

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AU - Gholve, Prasad

AU - Chatterjee, Payel

AU - Pasupuleti, Chaitanya

AU - Amrouch, Hussam

AU - Gangwar, Narendra

AU - Das, Shouvik

AU - Sharma, Uma

AU - van Santen, Victor M.

AU - Mahapatra, Souvik

PY - 2023/3

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AB - Circuit Aging Reliability Analysis Tool (CARAT), a framework that calculates random activity (frequency and duty) aware degradation of FETs to simulate circuit aging under real operating workloads is proposed. Bias Temperature Instability (BTI) and Hot Carrier Degradation (HCD) induced degradation of FETs is calculated in a cycle-by-cycle manner based on actual terminal waveforms grabbed from SPICE. Framework capability is demonstrated by using Level Shifter (LS) under random data-path activity, and Ring Oscillator (RO) under Dynamic Voltage Frequency Scaling (DVFS) conditions. The risk associated with the standard blanket approach is discussed.

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KW - DVFS

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KW - Ring Oscillator

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CARAT – A reliability analysis framework for BTI-HCD aging in circuits

Abstract

Keywords

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