@inproceedings{831907ca17b0473986ccedb2880aa45d,
title = "Cache efficiency and scalability on multi-core architectures",
abstract = "Two electrical engineering applications from industry partners dealing with sparse matrices were analyzed regarding cache efficiency and scalability on modern multi core systems. Two different contemporary multi-core architectures have been investigated, namely Intel's Westmere and AMD's Magny-Cours. This paper can be regarded as a continuation of the investigations presented in [14] and [15]. In addition, the SuiteSparseQR library for efficiently computing QR factorizations of sparse matrices was evaluated regarding scalability and cache efficiency.",
keywords = "Amdahl's Law, SuiteSparseQR, cache efficiency, multi-core, sparse matrix, thread-to-core assignment",
author = "Thomas M{\"u}ller and Carsten Trinitis and Jasmin Smajic",
year = "2011",
doi = "10.1007/978-3-642-23178-0_8",
language = "English",
isbn = "9783642231773",
series = "Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)",
pages = "88--97",
booktitle = "Parallel Computing Technologies - 11th International Conference, PaCT 2011, Proceedings",
note = "11th International Conference on Parallel Computing Technologies, PaCT 2011 ; Conference date: 19-09-2011 Through 23-09-2011",
}