BEOL FeFET SPICE-Compatible Model for Benchmarking 3-D Monolithic In-Memory TCAM Computation

Shubham Kumar, Om Prakash, Yogesh Singh Chauhan, Hussam Amrouch

Research output: Contribution to journalArticlepeer-review

3 Scopus citations

Abstract

Monolithic 3-D (M3D) integration of logic circuits and memory devices has been the most desired strategy for overcoming the von Neumann bottleneck. Amorphous indium gallium zinc oxide (a-IGZO) is a suitable low-temperature material for M3D integration. A ferroelectric field-effect transistor (FeFET) addresses nonvolatile memory challenges but faces limitations in in-memory computing (IMC) due to a small memory window (MW). M3D integrated back-end-of-line (BEOL) dual-port FeFET shows promise by amplifying MW through back-gate (BG) reading. In this study, we calibrated the TCAD model with the measurement data for BEOL IGZO-based conventional and dual-port FeFET. A SPICE-compatible Verilog-A model was developed for IMC simulation, particularly ternary content-addressable memory (TCAM). Performance evaluation of BEOL FeFET-based TCAM array focused on operation latency and search energy for various Hamming distances (HDs). Although the larger MW in BG read FeFET, it did not necessarily result in an efficient TCAM array. Average search energies for different HDs were 0.469 pJ (FG read) and 2.906 pJ (BG read) TCAM arrays.

Original languageEnglish
Pages (from-to)6286-6292
Number of pages7
JournalIEEE Transactions on Electron Devices
Volume70
Issue number12
DOIs
StatePublished - 1 Dec 2023

Keywords

  • Back-end-of-line (BEOL)
  • ferroelectric
  • in-memory computing (IMC)
  • monolithic 3-D (M3D)
  • ternary content-addressable memory (TCAM)

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