TY - JOUR
T1 - BEOL FeFET SPICE-Compatible Model for Benchmarking 3-D Monolithic In-Memory TCAM Computation
AU - Kumar, Shubham
AU - Prakash, Om
AU - Chauhan, Yogesh Singh
AU - Amrouch, Hussam
N1 - Publisher Copyright:
© 2023 IEEE.
PY - 2023/12/1
Y1 - 2023/12/1
N2 - Monolithic 3-D (M3D) integration of logic circuits and memory devices has been the most desired strategy for overcoming the von Neumann bottleneck. Amorphous indium gallium zinc oxide (a-IGZO) is a suitable low-temperature material for M3D integration. A ferroelectric field-effect transistor (FeFET) addresses nonvolatile memory challenges but faces limitations in in-memory computing (IMC) due to a small memory window (MW). M3D integrated back-end-of-line (BEOL) dual-port FeFET shows promise by amplifying MW through back-gate (BG) reading. In this study, we calibrated the TCAD model with the measurement data for BEOL IGZO-based conventional and dual-port FeFET. A SPICE-compatible Verilog-A model was developed for IMC simulation, particularly ternary content-addressable memory (TCAM). Performance evaluation of BEOL FeFET-based TCAM array focused on operation latency and search energy for various Hamming distances (HDs). Although the larger MW in BG read FeFET, it did not necessarily result in an efficient TCAM array. Average search energies for different HDs were 0.469 pJ (FG read) and 2.906 pJ (BG read) TCAM arrays.
AB - Monolithic 3-D (M3D) integration of logic circuits and memory devices has been the most desired strategy for overcoming the von Neumann bottleneck. Amorphous indium gallium zinc oxide (a-IGZO) is a suitable low-temperature material for M3D integration. A ferroelectric field-effect transistor (FeFET) addresses nonvolatile memory challenges but faces limitations in in-memory computing (IMC) due to a small memory window (MW). M3D integrated back-end-of-line (BEOL) dual-port FeFET shows promise by amplifying MW through back-gate (BG) reading. In this study, we calibrated the TCAD model with the measurement data for BEOL IGZO-based conventional and dual-port FeFET. A SPICE-compatible Verilog-A model was developed for IMC simulation, particularly ternary content-addressable memory (TCAM). Performance evaluation of BEOL FeFET-based TCAM array focused on operation latency and search energy for various Hamming distances (HDs). Although the larger MW in BG read FeFET, it did not necessarily result in an efficient TCAM array. Average search energies for different HDs were 0.469 pJ (FG read) and 2.906 pJ (BG read) TCAM arrays.
KW - Back-end-of-line (BEOL)
KW - ferroelectric
KW - in-memory computing (IMC)
KW - monolithic 3-D (M3D)
KW - ternary content-addressable memory (TCAM)
UR - http://www.scopus.com/inward/record.url?scp=85177055727&partnerID=8YFLogxK
U2 - 10.1109/TED.2023.3327034
DO - 10.1109/TED.2023.3327034
M3 - Article
AN - SCOPUS:85177055727
SN - 0018-9383
VL - 70
SP - 6286
EP - 6292
JO - IEEE Transactions on Electron Devices
JF - IEEE Transactions on Electron Devices
IS - 12
ER -