TY - GEN
T1 - Benchmarking IWO-based Logic Circuits for Monolithic 3D Integration
AU - Shahin, Sufia
AU - Kumar, Shubham
AU - Chatterjee, Swetaki
AU - Amrouch, Hussam
AU - Chauhan, Yogesh Singh
N1 - Publisher Copyright:
© 2024 IEEE.
PY - 2024
Y1 - 2024
N2 - This study shows a comprehensive evaluation of Back End Of Line (BEOL) compatible Tungsten doped amorphous Indium Oxide (a-IWO) Dual-Gate (DG) Thin Film Transistor (TFT) showcasing high performance at an ultra-thin channel thickness of 7 nm with on-off current ratio ∼ 4× 109. In this study, digital logic gates such as the inverter, NAND, and NOR gates were tested against 28 nm FDSOI CMOS technology. The results showed that the TFT technology outperformed the FDSOI technology in terms of static and dynamic power consumption, as well as energy efficiency. The improvements reported by TFT were quite significant. For the NAND logic implementations, the performance improved by factors of 1.53×, 10.3×, and 6.4×, respectively. However, for the NOR logic implementation, the performance improvement factors were 0.33×, 14.8×, and 8.8×, respectively.
AB - This study shows a comprehensive evaluation of Back End Of Line (BEOL) compatible Tungsten doped amorphous Indium Oxide (a-IWO) Dual-Gate (DG) Thin Film Transistor (TFT) showcasing high performance at an ultra-thin channel thickness of 7 nm with on-off current ratio ∼ 4× 109. In this study, digital logic gates such as the inverter, NAND, and NOR gates were tested against 28 nm FDSOI CMOS technology. The results showed that the TFT technology outperformed the FDSOI technology in terms of static and dynamic power consumption, as well as energy efficiency. The improvements reported by TFT were quite significant. For the NAND logic implementations, the performance improved by factors of 1.53×, 10.3×, and 6.4×, respectively. However, for the NOR logic implementation, the performance improvement factors were 0.33×, 14.8×, and 8.8×, respectively.
KW - Amorphous Indium Tungsten Oxide (a-IWO)
KW - Back End Of Line (BEOL)
KW - Dual-Gate Thin Film Transistor (DG-TFT)
KW - FDSOI
UR - http://www.scopus.com/inward/record.url?scp=85193276096&partnerID=8YFLogxK
U2 - 10.1109/EDTM58488.2024.10511830
DO - 10.1109/EDTM58488.2024.10511830
M3 - Conference contribution
AN - SCOPUS:85193276096
T3 - IEEE Electron Devices Technology and Manufacturing Conference: Strengthening the Globalization in Semiconductors, EDTM 2024
BT - IEEE Electron Devices Technology and Manufacturing Conference
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 8th IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2024
Y2 - 3 March 2024 through 6 March 2024
ER -
