Avalanche breakdown capability of Power DMOS Transistors and the Wunsch-Bell relation

We show that the Wunsch-Bell relation for the failure of silicon power devices is not applicable to power DMOS transistors, since several conditions are not fulfilled. By extending a model developed by the authors in previous work to the case of multiple-cell devices, we can show that failure of DMOSTs under avalanche conditions is most probably caused by one cell running into unstable operation and exhibiting a stable current filament. A simple, well-known stability criterion for the feedback of the parasitic BJT current in MOS transistors is applied and its consistency with the simulation is evaluated. Finally, we show that results obtained from electrothermal device simulation and the respective failure criterion conform significantly better with the experimental findings than those derived from the Wunsch-Bell relation.