ATPG for reversible circuits using simulation, Boolean satisfiability, and pseudo Boolean optimization

Robert Wille; Hongyan Zhang; Rolf Drechsler

doi:10.1109/ISVLSI.2011.77

ATPG for reversible circuits using simulation, Boolean satisfiability, and pseudo Boolean optimization

Robert Wille, Hongyan Zhang, Rolf Drechsler

University of Bremen

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

44 Scopus citations

Abstract

Research in the domain of reversible circuits found significant interest in the last years - not least because of the promising applications e.g. in quantum computation and lowpower design. First physical realizations are already available, motivating the development of efficient testing methods for this kind of circuits. In this paper, complementary approaches for automatic test pattern generation for reversible circuits are introduced and evaluated. Besides a simulation-based technique, methods based on Boolean satisfiability and pseudo-Boolean optimization are thereby applied. Experiments on large reversible circuits show the suitability of the proposed approaches with respect to different application scenarios and test goals, respectively.

Original language	English
Title of host publication	Proceedings - 2011 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2011
Pages	120-125
Number of pages	6
DOIs	https://doi.org/10.1109/ISVLSI.2011.77
State	Published - 2011
Externally published	Yes
Event	2011 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2011 - Chennai, India Duration: 4 Jul 2011 → 6 Jul 2011

Publication series

Name	Proceedings - 2011 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2011

Conference

Conference	2011 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2011
Country/Territory	India
City	Chennai
Period	4/07/11 → 6/07/11

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10.1109/ISVLSI.2011.77

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Wille, R., Zhang, H., & Drechsler, R. (2011). ATPG for reversible circuits using simulation, Boolean satisfiability, and pseudo Boolean optimization. In Proceedings - 2011 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2011 (pp. 120-125). Article 5992492 (Proceedings - 2011 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2011). https://doi.org/10.1109/ISVLSI.2011.77

@inproceedings{99591d28955a4954aacc82b89c9f513e,

title = "ATPG for reversible circuits using simulation, Boolean satisfiability, and pseudo Boolean optimization",

abstract = "Research in the domain of reversible circuits found significant interest in the last years - not least because of the promising applications e.g. in quantum computation and lowpower design. First physical realizations are already available, motivating the development of efficient testing methods for this kind of circuits. In this paper, complementary approaches for automatic test pattern generation for reversible circuits are introduced and evaluated. Besides a simulation-based technique, methods based on Boolean satisfiability and pseudo-Boolean optimization are thereby applied. Experiments on large reversible circuits show the suitability of the proposed approaches with respect to different application scenarios and test goals, respectively.",

author = "Robert Wille and Hongyan Zhang and Rolf Drechsler",

year = "2011",

doi = "10.1109/ISVLSI.2011.77",

language = "English",

isbn = "9780769544472",

series = "Proceedings - 2011 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2011",

pages = "120--125",

booktitle = "Proceedings - 2011 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2011",

note = "2011 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2011 ; Conference date: 04-07-2011 Through 06-07-2011",

}

Wille, R, Zhang, H & Drechsler, R 2011, ATPG for reversible circuits using simulation, Boolean satisfiability, and pseudo Boolean optimization. in Proceedings - 2011 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2011., 5992492, Proceedings - 2011 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2011, pp. 120-125, 2011 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2011, Chennai, India, 4/07/11. https://doi.org/10.1109/ISVLSI.2011.77

ATPG for reversible circuits using simulation, Boolean satisfiability, and pseudo Boolean optimization. / Wille, Robert; Zhang, Hongyan; Drechsler, Rolf.
Proceedings - 2011 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2011. 2011. p. 120-125 5992492 (Proceedings - 2011 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2011).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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AB - Research in the domain of reversible circuits found significant interest in the last years - not least because of the promising applications e.g. in quantum computation and lowpower design. First physical realizations are already available, motivating the development of efficient testing methods for this kind of circuits. In this paper, complementary approaches for automatic test pattern generation for reversible circuits are introduced and evaluated. Besides a simulation-based technique, methods based on Boolean satisfiability and pseudo-Boolean optimization are thereby applied. Experiments on large reversible circuits show the suitability of the proposed approaches with respect to different application scenarios and test goals, respectively.

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ATPG for reversible circuits using simulation, Boolean satisfiability, and pseudo Boolean optimization

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