Area-efficient FPGA implementation of finite control set model predictive current control

The implementation of finite control set model predictive control (FCS-MPC) is a popular topic in the area of research. Especially for motors with small electrical time constants in the range of microseconds, the experimental implementation is challenging. Without branch and bound methods for reducing the necessary switching possibilities, FCS-MPC respects each switching possibility and the calculation effort will increase exponentially with the time horizon. To meet these challenges, more and more field programmable gate array (FPGA) based implementations are introduced. However, the resources (e.g. multipliers) of the FPGA are limited, therefore, this paper discusses an area-efficient implementation of an exhaustive search FCS-MPC approach for the current control at the example of a two-level voltage source inverter with a surface permanent magnet synchronous motor (SPMSM). The presented implementation uses an automated rapid control prototyping workflow for implementing a long horizon FCS-MPC. The investigations use resource streaming, sharing, multiplier optimization techniques and are implemented on an application-oriented calculation platform, instead of a high-performance laboratory solution. These considerations are useful for the transfer into industrial applications, which are the benefit of this paper.